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dma: Let dma_memory_read/write() take MemTxAttrs argument
Let devices specify transaction attributes when calling dma_memory_read() or dma_memory_write(). Patch created mechanically using spatch with this script: @@ expression E1, E2, E3, E4; @@ ( - dma_memory_read(E1, E2, E3, E4) + dma_memory_read(E1, E2, E3, E4, MEMTXATTRS_UNSPECIFIED) | - dma_memory_write(E1, E2, E3, E4) + dma_memory_write(E1, E2, E3, E4, MEMTXATTRS_UNSPECIFIED) ) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Li Qiang <liq3ea@gmail.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20211223115554.3155328-6-philmd@redhat.com>
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parent
23faf5694f
commit
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30 changed files with 241 additions and 150 deletions
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@ -53,7 +53,8 @@ static bool phb3_msi_read_ive(PnvPHB3 *phb, int srcno, uint64_t *out_ive)
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return false;
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}
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if (dma_memory_read(&address_space_memory, ive_addr, &ive, sizeof(ive))) {
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if (dma_memory_read(&address_space_memory, ive_addr,
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&ive, sizeof(ive), MEMTXATTRS_UNSPECIFIED)) {
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qemu_log_mask(LOG_GUEST_ERROR, "Failed to read IVE at 0x%" PRIx64,
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ive_addr);
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return false;
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@ -73,7 +74,8 @@ static void phb3_msi_set_p(Phb3MsiState *msi, int srcno, uint8_t gen)
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return;
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}
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if (dma_memory_write(&address_space_memory, ive_addr + 4, &p, 1)) {
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if (dma_memory_write(&address_space_memory, ive_addr + 4,
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&p, 1, MEMTXATTRS_UNSPECIFIED)) {
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qemu_log_mask(LOG_GUEST_ERROR,
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"Failed to write IVE (set P) at 0x%" PRIx64, ive_addr);
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}
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@ -89,7 +91,8 @@ static void phb3_msi_set_q(Phb3MsiState *msi, int srcno)
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return;
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}
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if (dma_memory_write(&address_space_memory, ive_addr + 5, &q, 1)) {
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if (dma_memory_write(&address_space_memory, ive_addr + 5,
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&q, 1, MEMTXATTRS_UNSPECIFIED)) {
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qemu_log_mask(LOG_GUEST_ERROR,
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"Failed to write IVE (set Q) at 0x%" PRIx64, ive_addr);
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}
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