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dma: Let dma_memory_read/write() take MemTxAttrs argument

Browse source 
Let devices specify transaction attributes when calling
dma_memory_read() or dma_memory_write().

Patch created mechanically using spatch with this script:

  @@
  expression E1, E2, E3, E4;
  @@
  (
  - dma_memory_read(E1, E2, E3, E4)
  + dma_memory_read(E1, E2, E3, E4, MEMTXATTRS_UNSPECIFIED)
  |
  - dma_memory_write(E1, E2, E3, E4)
  + dma_memory_write(E1, E2, E3, E4, MEMTXATTRS_UNSPECIFIED)
  )

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Li Qiang <liq3ea@gmail.com>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Acked-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20211223115554.3155328-6-philmd@redhat.com>
This commit is contained in:
Philippe Mathieu-Daudé 2020-09-03 10:08:29 +02:00
parent 23faf5694f
commit ba06fe8add
30 changed files with 241 additions and 150 deletions
Download patch file Download diff file Expand all files Collapse all files

25
hw/net/ftgmac100.c
View file

@ -453,7 +453,8 @@ static void do_phy_ctl(FTGMAC100State *s)
static int ftgmac100_read_bd(FTGMAC100Desc *bd, dma_addr_t addr)
{
if (dma_memory_read(&address_space_memory, addr, bd, sizeof(*bd))) {
if (dma_memory_read(&address_space_memory, addr,
bd, sizeof(*bd), MEMTXATTRS_UNSPECIFIED)) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to read descriptor @ 0x%"
HWADDR_PRIx "\n", __func__, addr);
return -1;
@ -473,7 +474,8 @@ static int ftgmac100_write_bd(FTGMAC100Desc *bd, dma_addr_t addr)
lebd.des1 = cpu_to_le32(bd->des1);
lebd.des2 = cpu_to_le32(bd->des2);
lebd.des3 = cpu_to_le32(bd->des3);
if (dma_memory_write(&address_space_memory, addr, &lebd, sizeof(lebd))) {
if (dma_memory_write(&address_space_memory, addr,
&lebd, sizeof(lebd), MEMTXATTRS_UNSPECIFIED)) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to write descriptor @ 0x%"
HWADDR_PRIx "\n", __func__, addr);
return -1;
@ -554,7 +556,8 @@ static void ftgmac100_do_tx(FTGMAC100State *s, uint32_t tx_ring,
len = sizeof(s->frame) - frame_size;
}
if (dma_memory_read(&address_space_memory, bd.des3, ptr, len)) {
if (dma_memory_read(&address_space_memory, bd.des3,
ptr, len, MEMTXATTRS_UNSPECIFIED)) {
qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to read packet @ 0x%x\n",
__func__, bd.des3);
s->isr |= FTGMAC100_INT_AHB_ERR;
@ -1030,20 +1033,24 @@ static ssize_t ftgmac100_receive(NetClientState *nc, const uint8_t *buf,
bd.des1 = lduw_be_p(buf + 14) | FTGMAC100_RXDES1_VLANTAG_AVAIL;
if (s->maccr & FTGMAC100_MACCR_RM_VLAN) {
dma_memory_write(&address_space_memory, buf_addr, buf, 12);
dma_memory_write(&address_space_memory, buf_addr + 12, buf + 16,
buf_len - 16);
dma_memory_write(&address_space_memory, buf_addr, buf, 12,
MEMTXATTRS_UNSPECIFIED);
dma_memory_write(&address_space_memory, buf_addr + 12,
buf + 16, buf_len - 16,
MEMTXATTRS_UNSPECIFIED);
} else {
dma_memory_write(&address_space_memory, buf_addr, buf, buf_len);
dma_memory_write(&address_space_memory, buf_addr, buf,
buf_len, MEMTXATTRS_UNSPECIFIED);
}
} else {
bd.des1 = 0;
dma_memory_write(&address_space_memory, buf_addr, buf, buf_len);
dma_memory_write(&address_space_memory, buf_addr, buf, buf_len,
MEMTXATTRS_UNSPECIFIED);
}
buf += buf_len;
if (size < 4) {
dma_memory_write(&address_space_memory, buf_addr + buf_len,
crc_ptr, 4 - size);
crc_ptr, 4 - size, MEMTXATTRS_UNSPECIFIED);
crc_ptr += 4 - size;
}