mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-07 01:33:56 -06:00
USB iso transfers support for the linux redirector and for UHCI, by Arnon Gilboa.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3328 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
parent
80f515e636
commit
b9dc033c0d
2 changed files with 621 additions and 89 deletions
146
hw/usb-uhci.c
146
hw/usb-uhci.c
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@ -25,6 +25,7 @@
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//#define DEBUG
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//#define DEBUG_PACKET
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//#define DEBUG_ISOCH
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#define UHCI_CMD_FGR (1 << 4)
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#define UHCI_CMD_EGSM (1 << 3)
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@ -88,6 +89,7 @@ typedef struct UHCIState {
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other queues will not be processed until the next frame. The solution
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is to allow multiple pending requests. */
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uint32_t async_qh;
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uint32_t async_frame_addr;
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USBPacket usb_packet;
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uint8_t usb_buf[2048];
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} UHCIState;
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@ -146,6 +148,58 @@ static void uhci_reset(UHCIState *s)
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}
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}
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static void uhci_save(QEMUFile *f, void *opaque)
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{
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UHCIState *s = opaque;
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uint8_t num_ports = NB_PORTS;
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int i;
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pci_device_save(&s->dev, f);
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qemu_put_8s(f, &num_ports);
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for (i = 0; i < num_ports; ++i)
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qemu_put_be16s(f, &s->ports[i].ctrl);
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qemu_put_be16s(f, &s->cmd);
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qemu_put_be16s(f, &s->status);
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qemu_put_be16s(f, &s->intr);
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qemu_put_be16s(f, &s->frnum);
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qemu_put_be32s(f, &s->fl_base_addr);
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qemu_put_8s(f, &s->sof_timing);
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qemu_put_8s(f, &s->status2);
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qemu_put_timer(f, s->frame_timer);
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}
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static int uhci_load(QEMUFile *f, void *opaque, int version_id)
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{
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UHCIState *s = opaque;
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uint8_t num_ports;
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int i, ret;
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if (version_id > 1)
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return -EINVAL;
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ret = pci_device_load(&s->dev, f);
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if (ret < 0)
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return ret;
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qemu_get_8s(f, &num_ports);
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if (num_ports != NB_PORTS)
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return -EINVAL;
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for (i = 0; i < num_ports; ++i)
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qemu_get_be16s(f, &s->ports[i].ctrl);
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qemu_get_be16s(f, &s->cmd);
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qemu_get_be16s(f, &s->status);
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qemu_get_be16s(f, &s->intr);
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qemu_get_be16s(f, &s->frnum);
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qemu_get_be32s(f, &s->fl_base_addr);
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qemu_get_8s(f, &s->sof_timing);
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qemu_get_8s(f, &s->status2);
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qemu_get_timer(f, s->frame_timer);
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return 0;
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}
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static void uhci_ioport_writeb(void *opaque, uint32_t addr, uint32_t val)
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{
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UHCIState *s = opaque;
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@ -449,10 +503,11 @@ static void uhci_async_complete_packet(USBPacket * packet, void *opaque);
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0 if TD successful
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1 if TD unsuccessful or inactive
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*/
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static int uhci_handle_td(UHCIState *s, UHCI_TD *td, int *int_mask)
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static int uhci_handle_td(UHCIState *s, UHCI_TD *td, int *int_mask,
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int completion)
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{
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uint8_t pid;
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int len, max_len, err, ret;
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int len = 0, max_len, err, ret = 0;
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/* ??? This is wrong for async completion. */
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if (td->ctrl & TD_CTRL_IOC) {
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@ -465,7 +520,8 @@ static int uhci_handle_td(UHCIState *s, UHCI_TD *td, int *int_mask)
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/* TD is active */
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max_len = ((td->token >> 21) + 1) & 0x7ff;
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pid = td->token & 0xff;
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if (s->async_qh) {
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if (completion && (s->async_qh || s->async_frame_addr)) {
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ret = s->usb_packet.len;
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if (ret >= 0) {
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len = ret;
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@ -481,7 +537,8 @@ static int uhci_handle_td(UHCIState *s, UHCI_TD *td, int *int_mask)
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len = 0;
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}
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s->async_qh = 0;
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} else {
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s->async_frame_addr = 0;
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} else if (!completion) {
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s->usb_packet.pid = pid;
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s->usb_packet.devaddr = (td->token >> 8) & 0x7f;
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s->usb_packet.devep = (td->token >> 15) & 0xf;
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@ -519,6 +576,7 @@ static int uhci_handle_td(UHCIState *s, UHCI_TD *td, int *int_mask)
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return -1;
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}
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}
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if (ret == USB_RET_ASYNC) {
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return 2;
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}
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@ -584,8 +642,42 @@ static void uhci_async_complete_packet(USBPacket * packet, void *opaque)
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uint32_t link;
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uint32_t old_td_ctrl;
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uint32_t val;
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uint32_t frame_addr;
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int ret;
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/* Handle async isochronous packet completion */
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frame_addr = s->async_frame_addr;
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if (frame_addr) {
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cpu_physical_memory_read(frame_addr, (uint8_t *)&link, 4);
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le32_to_cpus(&link);
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cpu_physical_memory_read(link & ~0xf, (uint8_t *)&td, sizeof(td));
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le32_to_cpus(&td.link);
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le32_to_cpus(&td.ctrl);
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le32_to_cpus(&td.token);
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le32_to_cpus(&td.buffer);
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old_td_ctrl = td.ctrl;
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ret = uhci_handle_td(s, &td, &s->pending_int_mask, 1);
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/* update the status bits of the TD */
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if (old_td_ctrl != td.ctrl) {
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val = cpu_to_le32(td.ctrl);
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cpu_physical_memory_write((link & ~0xf) + 4,
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(const uint8_t *)&val,
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sizeof(val));
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}
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if (ret == 2) {
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s->async_frame_addr = frame_addr;
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} else if (ret == 0) {
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/* update qh element link */
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val = cpu_to_le32(td.link);
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cpu_physical_memory_write(frame_addr,
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(const uint8_t *)&val,
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sizeof(val));
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}
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return;
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}
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link = s->async_qh;
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if (!link) {
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/* This should never happen. It means a TD somehow got removed
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@ -604,7 +696,8 @@ static void uhci_async_complete_packet(USBPacket * packet, void *opaque)
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le32_to_cpus(&td.token);
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le32_to_cpus(&td.buffer);
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old_td_ctrl = td.ctrl;
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ret = uhci_handle_td(s, &td, &s->pending_int_mask);
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ret = uhci_handle_td(s, &td, &s->pending_int_mask, 1);
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/* update the status bits of the TD */
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if (old_td_ctrl != td.ctrl) {
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val = cpu_to_le32(td.ctrl);
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@ -697,7 +790,8 @@ static void uhci_frame_timer(void *opaque)
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le32_to_cpus(&td.token);
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le32_to_cpus(&td.buffer);
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old_td_ctrl = td.ctrl;
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ret = uhci_handle_td(s, &td, &int_mask);
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ret = uhci_handle_td(s, &td, &int_mask, 0);
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/* update the status bits of the TD */
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if (old_td_ctrl != td.ctrl) {
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val = cpu_to_le32(td.ctrl);
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le32_to_cpus(&td.ctrl);
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le32_to_cpus(&td.token);
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le32_to_cpus(&td.buffer);
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/* Ignore isochonous transfers while there is an async packet
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pending. This is wrong, but we don't implement isochronous
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transfers anyway. */
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if (s->async_qh == 0) {
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old_td_ctrl = td.ctrl;
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ret = uhci_handle_td(s, &td, &int_mask);
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/* update the status bits of the TD */
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if (old_td_ctrl != td.ctrl) {
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val = cpu_to_le32(td.ctrl);
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cpu_physical_memory_write((link & ~0xf) + 4,
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(const uint8_t *)&val,
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sizeof(val));
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}
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if (ret < 0)
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break; /* interrupted frame */
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if (ret == 2) {
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/* We can't handle async isochronous transfers.
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Cancel The packet. */
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fprintf(stderr, "usb-uhci: Unimplemented async packet\n");
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usb_cancel_packet(&s->usb_packet);
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}
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/* Handle isochonous transfer. */
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/* FIXME: might be more than one isoc in frame */
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old_td_ctrl = td.ctrl;
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ret = uhci_handle_td(s, &td, &int_mask, 0);
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/* update the status bits of the TD */
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if (old_td_ctrl != td.ctrl) {
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val = cpu_to_le32(td.ctrl);
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cpu_physical_memory_write((link & ~0xf) + 4,
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(const uint8_t *)&val,
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sizeof(val));
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}
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if (ret < 0)
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break; /* interrupted frame */
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if (ret == 2) {
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s->async_frame_addr = frame_addr;
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}
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link = td.link;
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}
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usb_cancel_packet(&s->usb_packet);
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s->async_qh = 0;
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}
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/* prepare the timer for the next frame */
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expire_time = qemu_get_clock(vm_clock) +
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(ticks_per_sec / FRAME_TIMER_FREQ);
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pci_register_io_region(&s->dev, 4, 0x20,
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PCI_ADDRESS_SPACE_IO, uhci_map);
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}
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