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target/sparc: Implement 8-bit FPADD, FPADDS, and FPADDUS

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Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-11-04 21:04:27 -07:00
parent b2b4849336
commit b99c1bbddd
2 changed files with 20 additions and 0 deletions
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9
target/sparc/insns.decode
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@ -509,6 +509,15 @@ FCMPEq 10 000 cc:2 110101 ..... 0 0101 0111 ..... \
MOVdTOx 10 ..... 110110 00000 1 0001 0000 ..... @r_d2
MOVxTOd 10 ..... 110110 00000 1 0001 1000 ..... @d_r2
FPADD8 10 ..... 110110 ..... 1 0010 0100 ..... @d_d_d
FPADDS8 10 ..... 110110 ..... 1 0010 0110 ..... @d_d_d
FPADDUS8 10 ..... 110110 ..... 1 0010 0111 ..... @d_d_d
FPADDUS16 10 ..... 110110 ..... 1 0010 0011 ..... @d_d_d
FPSUB8 10 ..... 110110 ..... 1 0101 0100 ..... @d_d_d
FPSUBS8 10 ..... 110110 ..... 1 0101 0110 ..... @d_d_d
FPSUBUS8 10 ..... 110110 ..... 1 0101 0111 ..... @d_d_d
FPSUBUS16 10 ..... 110110 ..... 1 0101 0011 ..... @d_d_d
FLCMPs 10 000 cc:2 110110 rs1:5 1 0101 0001 rs2:5
FLCMPd 10 000 cc:2 110110 ..... 1 0101 0010 ..... \
rs1=%dfp_rs1 rs2=%dfp_rs2