hw/cxl/events: Add injection of DRAM events

Defined in CXL r3.0 8.2.9.2.1.2 DRAM Event Record, this event
provides information related to DRAM devices.

Example injection command in QMP:

{ "execute": "cxl-inject-dram-event",
    "arguments": {
        "path": "/machine/peripheral/cxl-mem0",
        "log": "informational",
        "flags": 1,
        "dpa": 1000,
        "descriptor": 3,
        "type": 3,
        "transaction-type": 192,
        "channel": 3,
        "rank": 17,
        "nibble-mask": 37421234,
        "bank-group": 7,
        "bank": 11,
        "row": 2,
        "column": 77,
        "correction-mask": [33, 44, 55,66]
    }}

Acked-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230530133603.16934-7-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Jonathan Cameron 2023-05-30 14:36:02 +01:00 committed by Michael S. Tsirkin
parent ea9b6d647f
commit b90a324eda
4 changed files with 213 additions and 0 deletions

View file

@ -123,4 +123,27 @@ typedef struct CXLEventGenMedia {
uint8_t reserved[CXL_EVENT_GEN_MED_RES_SIZE];
} QEMU_PACKED CXLEventGenMedia;
/*
* DRAM Event Record
* CXL Rev 3.0 Section 8.2.9.2.1.2: Table 8-44
* All fields little endian.
*/
typedef struct CXLEventDram {
CXLEventRecordHdr hdr;
uint64_t phys_addr;
uint8_t descriptor;
uint8_t type;
uint8_t transaction_type;
uint16_t validity_flags;
uint8_t channel;
uint8_t rank;
uint8_t nibble_mask[3];
uint8_t bank_group;
uint8_t bank;
uint8_t row[3];
uint16_t column;
uint64_t correction_mask[4];
uint8_t reserved[0x17];
} QEMU_PACKED CXLEventDram;
#endif /* CXL_EVENTS_H */