mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-03 15:53:54 -06:00
* Fix for NULL segments (Bin Meng)
* Support for 32768 CPUs on x86 without IOMMU (David) * PDEP/PEXT fix and testcase (myself) * Remove bios_name and ram_size globals (myself) * qemu_init rationalization (myself) * Update kernel-doc (myself + upstream patches) * Propagate MemTxResult across DMA and PCI functions (Philippe) * Remove master/slave when applicable (Philippe) * WHPX support for in-kernel irqchip (Sunil) -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAl/SWS4UHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroMHLAf8Cr1nOn1ou2S2H9vePeoqRAVGdQBv tbQ/nZs+2NZMyhLF7mBj7y6Ym0wNyXzkyiFnN1wR04V5e0tF+q1Y0OOZtihJ+Ntk esjzHAzdqS22xI2dNnNDBo69eQQKDq3C0Ug5x6z63tO81AoTNKP+vq+QbZqe7v7K 2TScroAnhX9zE5Hz1+qJ35w13EMCNFnUPHNcOwxVSGHj4HNoEpIjjcE6rme46jX+ REsEGKJKIJ88aV2hzOLSrdJ0/mNuWsjfOvcfgtoIYUPbb55hHMykqD+LapoyEp8K gjnco6JT6wWFN1+tVxTjY4TaERVw+NGomd2QyHSbanDoRd8igFhxu2gBnQ== =yeQi -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging * Fix for NULL segments (Bin Meng) * Support for 32768 CPUs on x86 without IOMMU (David) * PDEP/PEXT fix and testcase (myself) * Remove bios_name and ram_size globals (myself) * qemu_init rationalization (myself) * Update kernel-doc (myself + upstream patches) * Propagate MemTxResult across DMA and PCI functions (Philippe) * Remove master/slave when applicable (Philippe) * WHPX support for in-kernel irqchip (Sunil) # gpg: Signature made Thu 10 Dec 2020 17:21:50 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (113 commits) scripts: kernel-doc: remove unnecessary change wrt Linux Revert "docs: temporarily disable the kernel-doc extension" scripts: kernel-doc: use :c:union when needed scripts: kernel-doc: split typedef complex regex scripts: kernel-doc: fix typedef parsing Revert "kernel-doc: Handle function typedefs that return pointers" Revert "kernel-doc: Handle function typedefs without asterisks" scripts: kernel-doc: try to use c:function if possible scripts: kernel-doc: fix line number handling scripts: kernel-doc: allow passing desired Sphinx C domain dialect scripts: kernel-doc: don't mangle with parameter list scripts: kernel-doc: fix typedef identification scripts: kernel-doc: reimplement -nofunction argument scripts: kernel-doc: fix troubles with line counts scripts: kernel-doc: use a less pedantic markup for funcs on Sphinx 3.x scripts: kernel-doc: make it more compatible with Sphinx 3.x Revert "kernel-doc: Use c:struct for Sphinx 3.0 and later" Revert "scripts/kerneldoc: For Sphinx 3 use c:macro for macros with arguments" scripts: kernel-doc: add support for typedef enum kernel-doc: add support for ____cacheline_aligned attribute ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
b785d25e91
151 changed files with 2883 additions and 1772 deletions
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@ -26,6 +26,7 @@ OBJECT_DECLARE_TYPE(MachineState, MachineClass, MACHINE)
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extern MachineState *current_machine;
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void machine_run_board_init(MachineState *machine);
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bool machine_smp_parse(MachineState *ms, QemuOpts *opts, Error **errp);
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bool machine_usb(MachineState *machine);
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int machine_phandle_start(MachineState *machine);
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bool machine_dump_guest_core(MachineState *machine);
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@ -282,6 +283,7 @@ struct MachineState {
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ram_addr_t maxram_size;
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uint64_t ram_slots;
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const char *boot_order;
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const char *boot_once;
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char *kernel_filename;
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char *kernel_cmdline;
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char *initrd_filename;
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@ -102,7 +102,8 @@ void x86_cpu_unplug_request_cb(HotplugHandler *hotplug_dev,
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void x86_cpu_unplug_cb(HotplugHandler *hotplug_dev,
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DeviceState *dev, Error **errp);
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void x86_bios_rom_init(MemoryRegion *rom_memory, bool isapc_ram_fw);
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void x86_bios_rom_init(MachineState *ms, const char *default_firmware,
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MemoryRegion *rom_memory, bool isapc_ram_fw);
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void x86_load_linux(X86MachineState *x86ms,
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FWCfgState *fw_cfg,
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@ -33,7 +33,7 @@
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* be lowered once it has been asserted.
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*/
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struct MAX111xState {
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SSISlave parent_obj;
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SSIPeripheral parent_obj;
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qemu_irq interrupt;
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/* Values of inputs at system reset (settable by QOM property) */
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@ -781,20 +781,58 @@ static inline AddressSpace *pci_get_address_space(PCIDevice *dev)
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return &dev->bus_master_as;
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}
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static inline int pci_dma_rw(PCIDevice *dev, dma_addr_t addr,
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void *buf, dma_addr_t len, DMADirection dir)
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/**
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* pci_dma_rw: Read from or write to an address space from PCI device.
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*
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* Return a MemTxResult indicating whether the operation succeeded
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* or failed (eg unassigned memory, device rejected the transaction,
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* IOMMU fault).
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*
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* @dev: #PCIDevice doing the memory access
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* @addr: address within the #PCIDevice address space
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* @buf: buffer with the data transferred
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* @len: the number of bytes to read or write
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* @dir: indicates the transfer direction
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*/
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static inline MemTxResult pci_dma_rw(PCIDevice *dev, dma_addr_t addr,
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void *buf, dma_addr_t len,
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DMADirection dir)
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{
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return dma_memory_rw(pci_get_address_space(dev), addr, buf, len, dir);
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}
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static inline int pci_dma_read(PCIDevice *dev, dma_addr_t addr,
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void *buf, dma_addr_t len)
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/**
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* pci_dma_read: Read from an address space from PCI device.
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*
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* Return a MemTxResult indicating whether the operation succeeded
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* or failed (eg unassigned memory, device rejected the transaction,
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* IOMMU fault). Called within RCU critical section.
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*
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* @dev: #PCIDevice doing the memory access
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* @addr: address within the #PCIDevice address space
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* @buf: buffer with the data transferred
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* @len: length of the data transferred
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*/
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static inline MemTxResult pci_dma_read(PCIDevice *dev, dma_addr_t addr,
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void *buf, dma_addr_t len)
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{
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return pci_dma_rw(dev, addr, buf, len, DMA_DIRECTION_TO_DEVICE);
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}
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static inline int pci_dma_write(PCIDevice *dev, dma_addr_t addr,
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const void *buf, dma_addr_t len)
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/**
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* pci_dma_write: Write to address space from PCI device.
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*
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* Return a MemTxResult indicating whether the operation succeeded
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* or failed (eg unassigned memory, device rejected the transaction,
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* IOMMU fault).
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*
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* @dev: #PCIDevice doing the memory access
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* @addr: address within the #PCIDevice address space
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* @buf: buffer with the data transferred
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* @len: the number of bytes to write
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*/
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static inline MemTxResult pci_dma_write(PCIDevice *dev, dma_addr_t addr,
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const void *buf, dma_addr_t len)
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{
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return pci_dma_rw(dev, addr, (void *) buf, len, DMA_DIRECTION_FROM_DEVICE);
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}
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@ -787,14 +787,6 @@ BusState *sysbus_get_default(void);
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char *qdev_get_fw_dev_path(DeviceState *dev);
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char *qdev_get_own_fw_dev_path_from_handler(BusState *bus, DeviceState *dev);
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/**
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* @qdev_machine_init
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*
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* Initialize platform devices before machine init. This is a hack until full
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* support for composition is added.
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*/
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void qdev_machine_init(void);
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/**
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* device_legacy_reset:
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*
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@ -43,7 +43,7 @@ typedef struct AspeedSMCController {
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uint8_t r_timings;
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uint8_t nregs_timings;
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uint8_t conf_enable_w0;
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uint8_t max_slaves;
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uint8_t max_peripherals;
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const AspeedSegments *segments;
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hwaddr flash_window_base;
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uint32_t flash_window_size;
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@ -1,12 +1,14 @@
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/* QEMU Synchronous Serial Interface support. */
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/* In principle SSI is a point-point interface. As such the qemu
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implementation has a single slave device on a "bus".
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However it is fairly common for boards to have multiple slaves
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connected to a single master, and select devices with an external
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chip select. This is implemented in qemu by having an explicit mux device.
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It is assumed that master and slave are both using the same transfer width.
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*/
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/*
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* In principle SSI is a point-point interface. As such the qemu
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* implementation has a single peripheral on a "bus".
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* However it is fairly common for boards to have multiple peripherals
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* connected to a single master, and select devices with an external
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* chip select. This is implemented in qemu by having an explicit mux device.
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* It is assumed that master and peripheral are both using the same transfer
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* width.
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*/
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#ifndef QEMU_SSI_H
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#define QEMU_SSI_H
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@ -16,9 +18,9 @@
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typedef enum SSICSMode SSICSMode;
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#define TYPE_SSI_SLAVE "ssi-slave"
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OBJECT_DECLARE_TYPE(SSISlave, SSISlaveClass,
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SSI_SLAVE)
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#define TYPE_SSI_PERIPHERAL "ssi-peripheral"
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OBJECT_DECLARE_TYPE(SSIPeripheral, SSIPeripheralClass,
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SSI_PERIPHERAL)
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#define SSI_GPIO_CS "ssi-gpio-cs"
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@ -28,21 +30,21 @@ enum SSICSMode {
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SSI_CS_HIGH,
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};
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/* Slave devices. */
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struct SSISlaveClass {
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/* Peripherals. */
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struct SSIPeripheralClass {
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DeviceClass parent_class;
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void (*realize)(SSISlave *dev, Error **errp);
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void (*realize)(SSIPeripheral *dev, Error **errp);
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/* if you have standard or no CS behaviour, just override transfer.
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* This is called when the device cs is active (true by default).
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*/
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uint32_t (*transfer)(SSISlave *dev, uint32_t val);
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uint32_t (*transfer)(SSIPeripheral *dev, uint32_t val);
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/* called when the CS line changes. Optional, devices only need to implement
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* this if they have side effects associated with the cs line (beyond
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* tristating the txrx lines).
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*/
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int (*set_cs)(SSISlave *dev, bool select);
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int (*set_cs)(SSIPeripheral *dev, bool select);
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/* define whether or not CS exists and is active low/high */
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SSICSMode cs_polarity;
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@ -51,30 +53,30 @@ struct SSISlaveClass {
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* cs_polarity are unused if this is overwritten. Transfer_raw will
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* always be called for the device for every txrx access to the parent bus
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*/
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uint32_t (*transfer_raw)(SSISlave *dev, uint32_t val);
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uint32_t (*transfer_raw)(SSIPeripheral *dev, uint32_t val);
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};
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struct SSISlave {
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struct SSIPeripheral {
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DeviceState parent_obj;
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/* Chip select state */
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bool cs;
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};
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extern const VMStateDescription vmstate_ssi_slave;
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extern const VMStateDescription vmstate_ssi_peripheral;
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#define VMSTATE_SSI_SLAVE(_field, _state) { \
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#define VMSTATE_SSI_PERIPHERAL(_field, _state) { \
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.name = (stringify(_field)), \
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.size = sizeof(SSISlave), \
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.vmsd = &vmstate_ssi_slave, \
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.size = sizeof(SSIPeripheral), \
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.vmsd = &vmstate_ssi_peripheral, \
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.flags = VMS_STRUCT, \
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.offset = vmstate_offset_value(_state, _field, SSISlave), \
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.offset = vmstate_offset_value(_state, _field, SSIPeripheral), \
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}
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DeviceState *ssi_create_slave(SSIBus *bus, const char *name);
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DeviceState *ssi_create_peripheral(SSIBus *bus, const char *name);
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/**
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* ssi_realize_and_unref: realize and unref an SSI slave device
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* @dev: SSI slave device to realize
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* ssi_realize_and_unref: realize and unref an SSI peripheral
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* @dev: SSI peripheral to realize
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* @bus: SSI bus to put it on
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* @errp: error pointer
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*
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@ -85,10 +87,10 @@ DeviceState *ssi_create_slave(SSIBus *bus, const char *name);
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* This function is useful if you have created @dev via qdev_new()
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* (which takes a reference to the device it returns to you), so that
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* you can set properties on it before realizing it. If you don't need
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* to set properties then ssi_create_slave() is probably better (as it
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* to set properties then ssi_create_peripheral() is probably better (as it
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* does the create, init and realize in one step).
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*
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* If you are embedding the SSI slave into another QOM device and
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* If you are embedding the SSI peripheral into another QOM device and
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* initialized it via some variant on object_initialize_child() then
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* do not use this function, because that family of functions arrange
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* for the only reference to the child device to be held by the parent
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@ -99,7 +99,7 @@ typedef struct XilinxQSPIPS XilinxQSPIPS;
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struct XlnxZynqMPQSPIPS {
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XilinxQSPIPS parent_obj;
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StreamSlave *dma;
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StreamSink *dma;
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int gqspi_irqline;
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uint32_t regs[XLNX_ZYNQMP_SPIPS_R_MAX];
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@ -3,51 +3,50 @@
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#include "qom/object.h"
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/* stream slave. Used until qdev provides a generic way. */
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#define TYPE_STREAM_SLAVE "stream-slave"
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#define TYPE_STREAM_SINK "stream-sink"
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typedef struct StreamSlaveClass StreamSlaveClass;
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DECLARE_CLASS_CHECKERS(StreamSlaveClass, STREAM_SLAVE,
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TYPE_STREAM_SLAVE)
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#define STREAM_SLAVE(obj) \
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INTERFACE_CHECK(StreamSlave, (obj), TYPE_STREAM_SLAVE)
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typedef struct StreamSinkClass StreamSinkClass;
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DECLARE_CLASS_CHECKERS(StreamSinkClass, STREAM_SINK,
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TYPE_STREAM_SINK)
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#define STREAM_SINK(obj) \
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INTERFACE_CHECK(StreamSink, (obj), TYPE_STREAM_SINK)
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typedef struct StreamSlave StreamSlave;
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typedef struct StreamSink StreamSink;
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typedef void (*StreamCanPushNotifyFn)(void *opaque);
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struct StreamSlaveClass {
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struct StreamSinkClass {
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InterfaceClass parent;
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/**
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* can push - determine if a stream slave is capable of accepting at least
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* can push - determine if a stream sink is capable of accepting at least
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* one byte of data. Returns false if cannot accept. If not implemented, the
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* slave is assumed to always be capable of receiving.
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* @notify: Optional callback that the slave will call when the slave is
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* sink is assumed to always be capable of receiving.
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* @notify: Optional callback that the sink will call when the sink is
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* capable of receiving again. Only called if false is returned.
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* @notify_opaque: opaque data to pass to notify call.
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*/
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bool (*can_push)(StreamSlave *obj, StreamCanPushNotifyFn notify,
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bool (*can_push)(StreamSink *obj, StreamCanPushNotifyFn notify,
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void *notify_opaque);
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/**
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* push - push data to a Stream slave. The number of bytes pushed is
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* returned. If the slave short returns, the master must wait before trying
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* again, the slave may continue to just return 0 waiting for the vm time to
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* push - push data to a Stream sink. The number of bytes pushed is
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* returned. If the sink short returns, the master must wait before trying
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* again, the sink may continue to just return 0 waiting for the vm time to
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* advance. The can_push() function can be used to trap the point in time
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* where the slave is ready to receive again, otherwise polling on a QEMU
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* where the sink is ready to receive again, otherwise polling on a QEMU
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* timer will work.
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* @obj: Stream slave to push to
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* @obj: Stream sink to push to
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* @buf: Data to write
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* @len: Maximum number of bytes to write
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* @eop: End of packet flag
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*/
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size_t (*push)(StreamSlave *obj, unsigned char *buf, size_t len, bool eop);
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size_t (*push)(StreamSink *obj, unsigned char *buf, size_t len, bool eop);
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};
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size_t
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stream_push(StreamSlave *sink, uint8_t *buf, size_t len, bool eop);
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stream_push(StreamSink *sink, uint8_t *buf, size_t len, bool eop);
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bool
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stream_can_push(StreamSlave *sink, StreamCanPushNotifyFn notify,
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stream_can_push(StreamSink *sink, StreamCanPushNotifyFn notify,
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void *notify_opaque);
|
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||||
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||||
|
|
|
|||
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Reference in a new issue