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accel/tcg: Replace CPUState.env_ptr with cpu_env()

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Reviewed-by: Anton Johansson <anjo@rev.ng>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-09-13 17:22:49 -07:00
parent ad75a51e84
commit b77af26e97
58 changed files with 152 additions and 155 deletions
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2
target/hppa/mem_helper.c
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@ -335,7 +335,7 @@ void HELPER(itlbp)(CPUHPPAState *env, target_ulong addr, target_ureg reg)
synchronous across all processors. */
static void ptlb_work(CPUState *cpu, run_on_cpu_data data)
{
CPUHPPAState *env = cpu->env_ptr;
CPUHPPAState *env = cpu_env(cpu);
target_ulong addr = (target_ulong) data.target_ptr;
hppa_tlb_entry *ent = hppa_find_tlb(env, addr);

4
target/hppa/translate.c
View file

@ -3450,7 +3450,7 @@ static bool trans_b_gate(DisasContext *ctx, arg_b_gate *a)
#ifndef CONFIG_USER_ONLY
if (ctx->tb_flags & PSW_C) {
CPUHPPAState *env = ctx->cs->env_ptr;
CPUHPPAState *env = cpu_env(ctx->cs);
int type = hppa_artype_for_page(env, ctx->base.pc_next);
/* If we could not find a TLB entry, then we need to generate an
ITLB miss exception so the kernel will provide it.
@ -4119,7 +4119,7 @@ static void hppa_tr_insn_start(DisasContextBase *dcbase, CPUState *cs)
static void hppa_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs)
{
DisasContext *ctx = container_of(dcbase, DisasContext, base);
CPUHPPAState *env = cs->env_ptr;
CPUHPPAState *env = cpu_env(cs);
DisasJumpType ret;
int i, n;