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hw/arm/allwinner-h3: add SDRAM controller device

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In the Allwinner H3 SoC the SDRAM controller is responsible
for interfacing with the external Synchronous Dynamic Random
Access Memory (SDRAM). Types of memory that the SDRAM controller
supports are DDR2/DDR3 and capacities of up to 2GiB. This commit
adds emulation support of the Allwinner H3 SDRAM controller.

Signed-off-by: Niek Linnenbank <nieklinnenbank@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20200311221854.30370-12-nieklinnenbank@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Niek Linnenbank 2020-03-11 23:18:47 +01:00 • committed by Peter Maydell
parent a80beb160d
commit b71d0385e9
7 changed files with 502 additions and 3 deletions
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6
hw/arm/orangepi.c
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@ -80,6 +80,12 @@ static void orangepi_init(MachineState *machine)
/* Setup EMAC properties */
object_property_set_int(OBJECT(&h3->emac), 1, "phy-addr", &error_abort);
/* DRAMC */
object_property_set_uint(OBJECT(h3), h3->memmap[AW_H3_SDRAM],
"ram-addr", &error_abort);
object_property_set_int(OBJECT(h3), machine->ram_size / MiB, "ram-size",
&error_abort);
/* Mark H3 object realized */
object_property_set_bool(OBJECT(h3), true, "realized", &error_abort);