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apic: add support for x2APIC mode

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This commit extends the APIC ID to 32-bit long and remove the 255 max APIC
ID limit in userspace APIC. The array that manages local APICs is now
dynamically allocated based on the max APIC ID of created x86 machine.
Also, new x2APIC IPI destination determination scheme, self IPI and x2APIC
mode register access are supported.

Signed-off-by: Bui Quang Minh <minhquangbui99@gmail.com>
Message-Id: <20240111154404.5333-3-minhquangbui99@gmail.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Bui Quang Minh 2024-01-11 22:43:59 +07:00 • committed by Michael S. Tsirkin
parent b2101358e5
commit b5ee0468e9
7 changed files with 258 additions and 74 deletions
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18
target/i386/cpu-sysemu.c
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@ -235,6 +235,16 @@ void cpu_clear_apic_feature(CPUX86State *env)
env->features[FEAT_1_EDX] &= ~CPUID_APIC;
}
void cpu_set_apic_feature(CPUX86State *env)
{
env->features[FEAT_1_EDX] |= CPUID_APIC;
}
bool cpu_has_x2apic_feature(CPUX86State *env)
{
return env->features[FEAT_1_ECX] & CPUID_EXT_X2APIC;
}
bool cpu_is_bsp(X86CPU *cpu)
{
return cpu_get_apic_base(cpu->apic_state) & MSR_IA32_APICBASE_BSP;
@ -281,11 +291,17 @@ void x86_cpu_apic_create(X86CPU *cpu, Error **errp)
OBJECT(cpu->apic_state));
object_unref(OBJECT(cpu->apic_state));
qdev_prop_set_uint32(cpu->apic_state, "id", cpu->apic_id);
/* TODO: convert to link<> */
apic = APIC_COMMON(cpu->apic_state);
apic->cpu = cpu;
apic->apicbase = APIC_DEFAULT_ADDRESS | MSR_IA32_APICBASE_ENABLE;
/*
* apic_common_set_id needs to check if the CPU has x2APIC
* feature in case APIC ID >= 255, so we need to set apic->cpu
* before setting APIC ID
*/
qdev_prop_set_uint32(cpu->apic_state, "id", cpu->apic_id);
}
void x86_cpu_apic_realize(X86CPU *cpu, Error **errp)