motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-03 15:53:54 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

More efficient target register / TC accesses.

Browse source 
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4794 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
ths 2008-06-27 10:02:35 +00:00
parent a37ee56cb7
commit b5dc7732e1
16 changed files with 327 additions and 246 deletions
Download patch file Download diff file Expand all files Collapse all files

2
target-mips/translate_init.c
View file

@ -546,8 +546,6 @@ static int cpu_mips_register (CPUMIPSState *env, const mips_def_t *def)
env->CP0_TCStatus_rw_bitmask = def->CP0_TCStatus_rw_bitmask;
env->CP0_SRSCtl = def->CP0_SRSCtl;
env->current_tc = 0;
env->current_tc_gprs = &env->gpr[env->current_tc][0];
env->current_tc_hi = &env->HI[env->current_tc][0];
env->SEGBITS = def->SEGBITS;
env->SEGMask = (target_ulong)((1ULL << def->SEGBITS) - 1);
#if defined(TARGET_MIPS64)