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* pc: Add a description for the i8042 property

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* kvm: support for nested FRED
 * tests/unit: fix warning when compiling test-nested-aio-poll with LTO
 * kvm: refactoring of VM creation
 * target/i386: expose IBPB-BRTYPE and SBPB CPUID bits to the guest
 * hw/char: clean up serial
 * remove virtfs-proxy-helper
 * target/i386/kvm: Report which action failed in kvm_arch_put/get_registers
 * qom: improvements to object_resolve_path*()
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Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* pc: Add a description for the i8042 property
* kvm: support for nested FRED
* tests/unit: fix warning when compiling test-nested-aio-poll with LTO
* kvm: refactoring of VM creation
* target/i386: expose IBPB-BRTYPE and SBPB CPUID bits to the guest
* hw/char: clean up serial
* remove virtfs-proxy-helper
* target/i386/kvm: Report which action failed in kvm_arch_put/get_registers
* qom: improvements to object_resolve_path*()

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# gpg: Signature made Thu 03 Oct 2024 21:04:27 BST
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
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* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (23 commits)
  qom: update object_resolve_path*() documentation
  qom: set *ambiguous on all paths
  qom: rename object_resolve_path_type() "ambiguousp"
  target/i386/kvm: Report which action failed in kvm_arch_put/get_registers
  kvm: Allow kvm_arch_get/put_registers to accept Error**
  accel/kvm: refactor dirty ring setup
  minikconf: print error entirely on stderr
  9p: remove 'proxy' filesystem backend driver
  hw/char: Extract serial-mm
  hw/char/serial.h: Extract serial-isa.h
  hw: Remove unused inclusion of hw/char/serial.h
  target/i386: Expose IBPB-BRTYPE and SBPB CPUID bits to the guest
  kvm: refactor core virtual machine creation into its own function
  kvm/i386: replace identity_base variable with a constant
  kvm/i386: refactor kvm_arch_init and split it into smaller functions
  kvm: replace fprintf with error_report()/printf() in kvm_init()
  kvm/i386: fix return values of is_host_cpu_intel()
  kvm/i386: make kvm_filter_msr() and related definitions private to kvm module
  hw/i386/pc: Add a description for the i8042 property
  tests/unit: remove block layer code from test-nested-aio-poll
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

# Conflicts:
#	hw/arm/Kconfig
#	hw/arm/pxa2xx.c
This commit is contained in:
Peter Maydell 2024-10-04 19:28:37 +01:00
commit b5ab62b3c0
97 changed files with 825 additions and 3328 deletions
Download patch file Download diff file Expand all files Collapse all files

4
hw/char/Kconfig
View file

@ -21,6 +21,10 @@ config SERIAL_ISA
depends on ISA_BUS
select SERIAL
config SERIAL_MM
bool
select SERIAL
config SERIAL_PCI
bool
default y if PCI_DEVICES

1
hw/char/meson.build
View file

@ -13,6 +13,7 @@ system_ss.add(when: 'CONFIG_PL011', if_true: files('pl011.c'))
system_ss.add(when: 'CONFIG_SCLPCONSOLE', if_true: files('sclpconsole.c', 'sclpconsole-lm.c'))
system_ss.add(when: 'CONFIG_SERIAL', if_true: files('serial.c'))
system_ss.add(when: 'CONFIG_SERIAL_ISA', if_true: files('serial-isa.c'))
system_ss.add(when: 'CONFIG_SERIAL_MM', if_true: files('serial-mm.c'))
system_ss.add(when: 'CONFIG_SERIAL_PCI', if_true: files('serial-pci.c'))
system_ss.add(when: 'CONFIG_SERIAL_PCI_MULTI', if_true: files('serial-pci-multi.c'))
system_ss.add(when: 'CONFIG_SHAKTI_UART', if_true: files('shakti_uart.c'))

2
hw/char/omap_uart.c
View file

@ -20,7 +20,7 @@
#include "qemu/osdep.h"
#include "chardev/char.h"
#include "hw/arm/omap.h"
#include "hw/char/serial.h"
#include "hw/char/serial-mm.h"
#include "exec/address-spaces.h"
/* UARTs */

1
hw/char/riscv_htif.c
View file

@ -24,7 +24,6 @@
#include "qapi/error.h"
#include "qemu/log.h"
#include "hw/char/riscv_htif.h"
#include "hw/char/serial.h"
#include "chardev/char.h"
#include "chardev/char-fe.h"
#include "qemu/timer.h"

1
hw/char/serial-isa.c
View file

@ -29,6 +29,7 @@
#include "sysemu/sysemu.h"
#include "hw/acpi/acpi_aml_interface.h"
#include "hw/char/serial.h"
#include "hw/char/serial-isa.h"
#include "hw/isa/isa.h"
#include "hw/qdev-properties.h"
#include "migration/vmstate.h"

157
hw/char/serial-mm.c Normal file
View file

@ -0,0 +1,157 @@
/*
* QEMU 16550A UART emulation
*
* Copyright (c) 2003-2004 Fabrice Bellard
* Copyright (c) 2008 Citrix Systems, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "qemu/osdep.h"
#include "hw/char/serial-mm.h"
#include "exec/cpu-common.h"
#include "migration/vmstate.h"
#include "qapi/error.h"
#include "hw/qdev-properties.h"
static uint64_t serial_mm_read(void *opaque, hwaddr addr, unsigned size)
{
SerialMM *s = SERIAL_MM(opaque);
return serial_io_ops.read(&s->serial, addr >> s->regshift, 1);
}
static void serial_mm_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
SerialMM *s = SERIAL_MM(opaque);
value &= 255;
serial_io_ops.write(&s->serial, addr >> s->regshift, value, 1);
}
static const MemoryRegionOps serial_mm_ops[3] = {
[DEVICE_NATIVE_ENDIAN] = {
.read = serial_mm_read,
.write = serial_mm_write,
.endianness = DEVICE_NATIVE_ENDIAN,
.valid.max_access_size = 8,
.impl.max_access_size = 8,
},
[DEVICE_LITTLE_ENDIAN] = {
.read = serial_mm_read,
.write = serial_mm_write,
.endianness = DEVICE_LITTLE_ENDIAN,
.valid.max_access_size = 8,
.impl.max_access_size = 8,
},
[DEVICE_BIG_ENDIAN] = {
.read = serial_mm_read,
.write = serial_mm_write,
.endianness = DEVICE_BIG_ENDIAN,
.valid.max_access_size = 8,
.impl.max_access_size = 8,
},
};
static void serial_mm_realize(DeviceState *dev, Error **errp)
{
SerialMM *smm = SERIAL_MM(dev);
SerialState *s = &smm->serial;
if (!qdev_realize(DEVICE(s), NULL, errp)) {
return;
}
memory_region_init_io(&s->io, OBJECT(dev),
&serial_mm_ops[smm->endianness], smm, "serial",
8 << smm->regshift);
sysbus_init_mmio(SYS_BUS_DEVICE(smm), &s->io);
sysbus_init_irq(SYS_BUS_DEVICE(smm), &smm->serial.irq);
}
static const VMStateDescription vmstate_serial_mm = {
.name = "serial",
.version_id = 3,
.minimum_version_id = 2,
.fields = (const VMStateField[]) {
VMSTATE_STRUCT(serial, SerialMM, 0, vmstate_serial, SerialState),
VMSTATE_END_OF_LIST()
}
};
SerialMM *serial_mm_init(MemoryRegion *address_space,
hwaddr base, int regshift,
qemu_irq irq, int baudbase,
Chardev *chr, enum device_endian end)
{
SerialMM *smm = SERIAL_MM(qdev_new(TYPE_SERIAL_MM));
MemoryRegion *mr;
qdev_prop_set_uint8(DEVICE(smm), "regshift", regshift);
qdev_prop_set_uint32(DEVICE(smm), "baudbase", baudbase);
qdev_prop_set_chr(DEVICE(smm), "chardev", chr);
qdev_set_legacy_instance_id(DEVICE(smm), base, 2);
qdev_prop_set_uint8(DEVICE(smm), "endianness", end);
sysbus_realize_and_unref(SYS_BUS_DEVICE(smm), &error_fatal);
sysbus_connect_irq(SYS_BUS_DEVICE(smm), 0, irq);
mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(smm), 0);
memory_region_add_subregion(address_space, base, mr);
return smm;
}
static void serial_mm_instance_init(Object *o)
{
SerialMM *smm = SERIAL_MM(o);
object_initialize_child(o, "serial", &smm->serial, TYPE_SERIAL);
qdev_alias_all_properties(DEVICE(&smm->serial), o);
}
static Property serial_mm_properties[] = {
/*
* Set the spacing between adjacent memory-mapped UART registers.
* Each register will be at (1 << regshift) bytes after the previous one.
*/
DEFINE_PROP_UINT8("regshift", SerialMM, regshift, 0),
DEFINE_PROP_UINT8("endianness", SerialMM, endianness, DEVICE_NATIVE_ENDIAN),
DEFINE_PROP_END_OF_LIST(),
};
static void serial_mm_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
device_class_set_props(dc, serial_mm_properties);
dc->realize = serial_mm_realize;
dc->vmsd = &vmstate_serial_mm;
}
static const TypeInfo types[] = {
{
.name = TYPE_SERIAL_MM,
.parent = TYPE_SYS_BUS_DEVICE,
.class_init = serial_mm_class_init,
.instance_init = serial_mm_instance_init,
.instance_size = sizeof(SerialMM),
},
};
DEFINE_TYPES(types)

126
hw/char/serial.c
View file

@ -989,135 +989,9 @@ static const TypeInfo serial_info = {
.class_init = serial_class_init,
};
/* Memory mapped interface */
static uint64_t serial_mm_read(void *opaque, hwaddr addr,
unsigned size)
{
SerialMM *s = SERIAL_MM(opaque);
return serial_ioport_read(&s->serial, addr >> s->regshift, 1);
}
static void serial_mm_write(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
SerialMM *s = SERIAL_MM(opaque);
value &= 255;
serial_ioport_write(&s->serial, addr >> s->regshift, value, 1);
}
static const MemoryRegionOps serial_mm_ops[3] = {
[DEVICE_NATIVE_ENDIAN] = {
.read = serial_mm_read,
.write = serial_mm_write,
.endianness = DEVICE_NATIVE_ENDIAN,
.valid.max_access_size = 8,
.impl.max_access_size = 8,
},
[DEVICE_LITTLE_ENDIAN] = {
.read = serial_mm_read,
.write = serial_mm_write,
.endianness = DEVICE_LITTLE_ENDIAN,
.valid.max_access_size = 8,
.impl.max_access_size = 8,
},
[DEVICE_BIG_ENDIAN] = {
.read = serial_mm_read,
.write = serial_mm_write,
.endianness = DEVICE_BIG_ENDIAN,
.valid.max_access_size = 8,
.impl.max_access_size = 8,
},
};
static void serial_mm_realize(DeviceState *dev, Error **errp)
{
SerialMM *smm = SERIAL_MM(dev);
SerialState *s = &smm->serial;
if (!qdev_realize(DEVICE(s), NULL, errp)) {
return;
}
memory_region_init_io(&s->io, OBJECT(dev),
&serial_mm_ops[smm->endianness], smm, "serial",
8 << smm->regshift);
sysbus_init_mmio(SYS_BUS_DEVICE(smm), &s->io);
sysbus_init_irq(SYS_BUS_DEVICE(smm), &smm->serial.irq);
}
static const VMStateDescription vmstate_serial_mm = {
.name = "serial",
.version_id = 3,
.minimum_version_id = 2,
.fields = (const VMStateField[]) {
VMSTATE_STRUCT(serial, SerialMM, 0, vmstate_serial, SerialState),
VMSTATE_END_OF_LIST()
}
};
SerialMM *serial_mm_init(MemoryRegion *address_space,
hwaddr base, int regshift,
qemu_irq irq, int baudbase,
Chardev *chr, enum device_endian end)
{
SerialMM *smm = SERIAL_MM(qdev_new(TYPE_SERIAL_MM));
MemoryRegion *mr;
qdev_prop_set_uint8(DEVICE(smm), "regshift", regshift);
qdev_prop_set_uint32(DEVICE(smm), "baudbase", baudbase);
qdev_prop_set_chr(DEVICE(smm), "chardev", chr);
qdev_set_legacy_instance_id(DEVICE(smm), base, 2);
qdev_prop_set_uint8(DEVICE(smm), "endianness", end);
sysbus_realize_and_unref(SYS_BUS_DEVICE(smm), &error_fatal);
sysbus_connect_irq(SYS_BUS_DEVICE(smm), 0, irq);
mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(smm), 0);
memory_region_add_subregion(address_space, base, mr);
return smm;
}
static void serial_mm_instance_init(Object *o)
{
SerialMM *smm = SERIAL_MM(o);
object_initialize_child(o, "serial", &smm->serial, TYPE_SERIAL);
qdev_alias_all_properties(DEVICE(&smm->serial), o);
}
static Property serial_mm_properties[] = {
/*
* Set the spacing between adjacent memory-mapped UART registers.
* Each register will be at (1 << regshift) bytes after the
* previous one.
*/
DEFINE_PROP_UINT8("regshift", SerialMM, regshift, 0),
DEFINE_PROP_UINT8("endianness", SerialMM, endianness, DEVICE_NATIVE_ENDIAN),
DEFINE_PROP_END_OF_LIST(),
};
static void serial_mm_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
device_class_set_props(dc, serial_mm_properties);
dc->realize = serial_mm_realize;
dc->vmsd = &vmstate_serial_mm;
}
static const TypeInfo serial_mm_info = {
.name = TYPE_SERIAL_MM,
.parent = TYPE_SYS_BUS_DEVICE,
.class_init = serial_mm_class_init,
.instance_init = serial_mm_instance_init,
.instance_size = sizeof(SerialMM),
};
static void serial_register_types(void)
{
type_register_static(&serial_info);
type_register_static(&serial_mm_info);
}
type_init(serial_register_types)