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accel/tcg: Use target_long_bits() in cputlb.c

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Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2025-04-30 17:17:56 -07:00
parent a21959a8a8
commit b5555a077f
1 changed files with 13 additions and 12 deletions
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25
accel/tcg/cputlb.c
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@ -19,6 +19,7 @@
#include "qemu/osdep.h" #include "qemu/osdep.h"
#include "qemu/main-loop.h" #include "qemu/main-loop.h"
#include "qemu/target-info.h"
#include "accel/tcg/cpu-ops.h" #include "accel/tcg/cpu-ops.h"
#include "accel/tcg/iommu.h" #include "accel/tcg/iommu.h"
#include "accel/tcg/probe.h" #include "accel/tcg/probe.h"
@ -771,19 +772,19 @@ void tlb_flush_range_by_mmuidx(CPUState *cpu, vaddr addr,
assert_cpu_is_self(cpu); assert_cpu_is_self(cpu);
/* If no page bits are significant, this devolves to tlb_flush. */
if (bits < TARGET_PAGE_BITS) {
tlb_flush_by_mmuidx(cpu, idxmap);
return;
}
/* /*
* If all bits are significant, and len is small, * If all bits are significant, and len is small,
* this devolves to tlb_flush_page. * this devolves to tlb_flush_page.
*/ */
if (bits >= TARGET_LONG_BITS && len <= TARGET_PAGE_SIZE) { if (len <= TARGET_PAGE_SIZE && bits >= target_long_bits()) {
tlb_flush_page_by_mmuidx(cpu, addr, idxmap); tlb_flush_page_by_mmuidx(cpu, addr, idxmap);
return; return;
} }
/* If no page bits are significant, this devolves to tlb_flush. */
if (bits < TARGET_PAGE_BITS) {
tlb_flush_by_mmuidx(cpu, idxmap);
return;
}
/* This should already be page aligned */ /* This should already be page aligned */
d.addr = addr & TARGET_PAGE_MASK; d.addr = addr & TARGET_PAGE_MASK;
@ -809,19 +810,19 @@ void tlb_flush_range_by_mmuidx_all_cpus_synced(CPUState *src_cpu,
TLBFlushRangeData d, *p; TLBFlushRangeData d, *p;
CPUState *dst_cpu; CPUState *dst_cpu;
/* If no page bits are significant, this devolves to tlb_flush. */
if (bits < TARGET_PAGE_BITS) {
tlb_flush_by_mmuidx_all_cpus_synced(src_cpu, idxmap);
return;
}
/* /*
* If all bits are significant, and len is small, * If all bits are significant, and len is small,
* this devolves to tlb_flush_page. * this devolves to tlb_flush_page.
*/ */
if (bits >= TARGET_LONG_BITS && len <= TARGET_PAGE_SIZE) { if (len <= TARGET_PAGE_SIZE && bits >= target_long_bits()) {
tlb_flush_page_by_mmuidx_all_cpus_synced(src_cpu, addr, idxmap); tlb_flush_page_by_mmuidx_all_cpus_synced(src_cpu, addr, idxmap);
return; return;
} }
/* If no page bits are significant, this devolves to tlb_flush. */
if (bits < TARGET_PAGE_BITS) {
tlb_flush_by_mmuidx_all_cpus_synced(src_cpu, idxmap);
return;
}
/* This should already be page aligned */ /* This should already be page aligned */
d.addr = addr & TARGET_PAGE_MASK; d.addr = addr & TARGET_PAGE_MASK;