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accel/tcg: Use target_long_bits() in cputlb.c
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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1 changed files with 13 additions and 12 deletions
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@ -19,6 +19,7 @@
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#include "qemu/osdep.h"
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#include "qemu/main-loop.h"
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#include "qemu/target-info.h"
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#include "accel/tcg/cpu-ops.h"
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#include "accel/tcg/iommu.h"
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#include "accel/tcg/probe.h"
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@ -771,19 +772,19 @@ void tlb_flush_range_by_mmuidx(CPUState *cpu, vaddr addr,
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assert_cpu_is_self(cpu);
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/* If no page bits are significant, this devolves to tlb_flush. */
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if (bits < TARGET_PAGE_BITS) {
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tlb_flush_by_mmuidx(cpu, idxmap);
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return;
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}
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/*
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* If all bits are significant, and len is small,
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* this devolves to tlb_flush_page.
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*/
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if (bits >= TARGET_LONG_BITS && len <= TARGET_PAGE_SIZE) {
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if (len <= TARGET_PAGE_SIZE && bits >= target_long_bits()) {
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tlb_flush_page_by_mmuidx(cpu, addr, idxmap);
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return;
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}
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/* If no page bits are significant, this devolves to tlb_flush. */
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if (bits < TARGET_PAGE_BITS) {
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tlb_flush_by_mmuidx(cpu, idxmap);
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return;
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}
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/* This should already be page aligned */
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d.addr = addr & TARGET_PAGE_MASK;
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@ -809,19 +810,19 @@ void tlb_flush_range_by_mmuidx_all_cpus_synced(CPUState *src_cpu,
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TLBFlushRangeData d, *p;
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CPUState *dst_cpu;
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/* If no page bits are significant, this devolves to tlb_flush. */
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if (bits < TARGET_PAGE_BITS) {
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tlb_flush_by_mmuidx_all_cpus_synced(src_cpu, idxmap);
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return;
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}
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/*
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* If all bits are significant, and len is small,
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* this devolves to tlb_flush_page.
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*/
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if (bits >= TARGET_LONG_BITS && len <= TARGET_PAGE_SIZE) {
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if (len <= TARGET_PAGE_SIZE && bits >= target_long_bits()) {
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tlb_flush_page_by_mmuidx_all_cpus_synced(src_cpu, addr, idxmap);
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return;
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}
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/* If no page bits are significant, this devolves to tlb_flush. */
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if (bits < TARGET_PAGE_BITS) {
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tlb_flush_by_mmuidx_all_cpus_synced(src_cpu, idxmap);
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return;
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}
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/* This should already be page aligned */
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d.addr = addr & TARGET_PAGE_MASK;
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