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hw/riscv: Support to load DTB after 3GB memory on 64-bit system.

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Larger initrd image will overlap the DTB at 3GB address. Since 64-bit
system doesn't have 32-bit addressable issue, we just load DTB to the end
of dram in 64-bit system.

Signed-off-by: Jim Shu <jim.shu@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20241120153935.24706-2-jim.shu@sifive.com>
[ Changes by AF
 -  Store fdt_load_addr_hi32 in the reset vector
]
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Jim Shu 2024-11-20 23:39:33 +08:00 • committed by Alistair Francis
parent d2ed9fffba
commit b4132a9e62
6 changed files with 20 additions and 14 deletions
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2
include/hw/riscv/boot.h
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@ -49,7 +49,7 @@ target_ulong riscv_load_kernel(MachineState *machine,
bool load_initrd,
symbol_fn_t sym_cb);
uint64_t riscv_compute_fdt_addr(hwaddr dram_start, uint64_t dram_size,
MachineState *ms);
MachineState *ms, RISCVHartArrayState *harts);
void riscv_load_fdt(hwaddr fdt_addr, void *fdt);
void riscv_setup_rom_reset_vec(MachineState *machine, RISCVHartArrayState *harts,
hwaddr saddr,