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hw/riscv: Support to load DTB after 3GB memory on 64-bit system.

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Larger initrd image will overlap the DTB at 3GB address. Since 64-bit
system doesn't have 32-bit addressable issue, we just load DTB to the end
of dram in 64-bit system.

Signed-off-by: Jim Shu <jim.shu@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20241120153935.24706-2-jim.shu@sifive.com>
[ Changes by AF
 -  Store fdt_load_addr_hi32 in the reset vector
]
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Jim Shu 2024-11-20 23:39:33 +08:00 • committed by Alistair Francis
parent d2ed9fffba
commit b4132a9e62
6 changed files with 20 additions and 14 deletions
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14
hw/riscv/boot.c
View file

@ -293,7 +293,7 @@ out:
* The FDT is fdt_packed() during the calculation.
*/
uint64_t riscv_compute_fdt_addr(hwaddr dram_base, hwaddr dram_size,
MachineState *ms)
MachineState *ms, RISCVHartArrayState *harts)
{
int ret = fdt_pack(ms->fdt);
hwaddr dram_end, temp;
@ -317,11 +317,15 @@ uint64_t riscv_compute_fdt_addr(hwaddr dram_base, hwaddr dram_size,
/*
* We should put fdt as far as possible to avoid kernel/initrd overwriting
* its content. But it should be addressable by 32 bit system as well.
* Thus, put it at an 2MB aligned address that less than fdt size from the
* end of dram or 3GB whichever is lesser.
* its content. But it should be addressable by 32 bit system as well in RV32.
* Thus, put it near to the end of dram in RV64, and put it near to the end
* of dram or 3GB whichever is lesser in RV32.
*/
temp = (dram_base < 3072 * MiB) ? MIN(dram_end, 3072 * MiB) : dram_end;
if (!riscv_is_32bit(harts)) {
temp = dram_end;
} else {
temp = (dram_base < 3072 * MiB) ? MIN(dram_end, 3072 * MiB) : dram_end;
}
return QEMU_ALIGN_DOWN(temp - fdtsize, 2 * MiB);
}