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next-cube: separate rtc read and write shift logic

Browse source 
Introduce a new next_rtc_cmd_is_write() function to determine if an rtc command
is a read or write, and start by using it to avoid shifting the rtc input value
if a rtc read command is executed.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Thomas Huth <huth@tuxfamily.org>
Message-ID: <20241222130012.1013374-21-mark.cave-ayland@ilande.co.uk>
Signed-off-by: Thomas Huth <huth@tuxfamily.org>
This commit is contained in:
Mark Cave-Ayland 2024-12-22 12:59:59 +00:00 • committed by Thomas Huth
parent 825ac12564
commit b37da8b95f
1 changed files with 76 additions and 66 deletions
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142
hw/m68k/next-cube.c
View file

@ -165,6 +165,12 @@ static void next_scr2_led_update(NeXTPC *s)
}
}
static bool next_rtc_cmd_is_write(uint8_t cmd)
{
return (cmd >= 0x80 && cmd <= 0x9f) ||
(cmd == 0xb1);
}
static void next_scr2_rtc_update(NeXTPC *s)
{
uint8_t old_scr2, scr2_2;
@ -186,76 +192,80 @@ static void next_scr2_rtc_update(NeXTPC *s)
((scr2_2 & SCR2_RTDATA) ? 1 : 0);
}
if (rtc->phase >= 8 && rtc->phase < 16) {
rtc->value = (rtc->value << 1) |
((scr2_2 & SCR2_RTDATA) ? 1 : 0);
if (next_rtc_cmd_is_write(rtc->command)) {
/* Shift in value to write */
rtc->value = (rtc->value << 1) |
((scr2_2 & SCR2_RTDATA) ? 1 : 0);
} else {
/* Shift out value to read */
/* if we read RAM register, output RT_DATA bit */
if (rtc->command <= 0x1F) {
scr2_2 = scr2_2 & (~SCR2_RTDATA);
if (rtc->ram[rtc->command] & (0x80 >> (rtc->phase - 8))) {
scr2_2 |= SCR2_RTDATA;
/* if we read RAM register, output RT_DATA bit */
if (rtc->command <= 0x1F) {
scr2_2 = scr2_2 & (~SCR2_RTDATA);
if (rtc->ram[rtc->command] &
(0x80 >> (rtc->phase - 8))) {
scr2_2 |= SCR2_RTDATA;
}
rtc->retval = (rtc->retval << 1) |
((scr2_2 & SCR2_RTDATA) ? 1 : 0);
}
/* read the status 0x30 */
if (rtc->command == 0x30) {
scr2_2 = scr2_2 & (~SCR2_RTDATA);
/* for now status = 0x98 (new rtc + FTU) */
if (rtc->status & (0x80 >> (rtc->phase - 8))) {
scr2_2 |= SCR2_RTDATA;
}
rtc->retval = (rtc->retval << 1) |
((scr2_2 & SCR2_RTDATA) ? 1 : 0);
}
/* read the status 0x31 */
if (rtc->command == 0x31) {
scr2_2 = scr2_2 & (~SCR2_RTDATA);
if (rtc->control & (0x80 >> (rtc->phase - 8))) {
scr2_2 |= SCR2_RTDATA;
}
rtc->retval = (rtc->retval << 1) |
((scr2_2 & SCR2_RTDATA) ? 1 : 0);
}
rtc->retval = (rtc->retval << 1) |
((scr2_2 & SCR2_RTDATA) ? 1 : 0);
if ((rtc->command >= 0x20) && (rtc->command <= 0x2F)) {
scr2_2 = scr2_2 & (~SCR2_RTDATA);
/* for now 0x00 */
time_t time_h = time(NULL);
struct tm *info = localtime(&time_h);
int ret = 0;
switch (rtc->command) {
case 0x20:
ret = SCR2_TOBCD(info->tm_sec);
break;
case 0x21:
ret = SCR2_TOBCD(info->tm_min);
break;
case 0x22:
ret = SCR2_TOBCD(info->tm_hour);
break;
case 0x24:
ret = SCR2_TOBCD(info->tm_mday);
break;
case 0x25:
ret = SCR2_TOBCD((info->tm_mon + 1));
break;
case 0x26:
ret = SCR2_TOBCD((info->tm_year - 100));
break;
}
if (ret & (0x80 >> (rtc->phase - 8))) {
scr2_2 |= SCR2_RTDATA;
}
rtc->retval = (rtc->retval << 1) |
((scr2_2 & SCR2_RTDATA) ? 1 : 0);
}
}
/* read the status 0x30 */
if (rtc->command == 0x30) {
scr2_2 = scr2_2 & (~SCR2_RTDATA);
/* for now status = 0x98 (new rtc + FTU) */
if (rtc->status & (0x80 >> (rtc->phase - 8))) {
scr2_2 |= SCR2_RTDATA;
}
rtc->retval = (rtc->retval << 1) |
((scr2_2 & SCR2_RTDATA) ? 1 : 0);
}
/* read the status 0x31 */
if (rtc->command == 0x31) {
scr2_2 = scr2_2 & (~SCR2_RTDATA);
if (rtc->control & (0x80 >> (rtc->phase - 8))) {
scr2_2 |= SCR2_RTDATA;
}
rtc->retval = (rtc->retval << 1) |
((scr2_2 & SCR2_RTDATA) ? 1 : 0);
}
if ((rtc->command >= 0x20) && (rtc->command <= 0x2F)) {
scr2_2 = scr2_2 & (~SCR2_RTDATA);
/* for now 0x00 */
time_t time_h = time(NULL);
struct tm *info = localtime(&time_h);
int ret = 0;
switch (rtc->command) {
case 0x20:
ret = SCR2_TOBCD(info->tm_sec);
break;
case 0x21:
ret = SCR2_TOBCD(info->tm_min);
break;
case 0x22:
ret = SCR2_TOBCD(info->tm_hour);
break;
case 0x24:
ret = SCR2_TOBCD(info->tm_mday);
break;
case 0x25:
ret = SCR2_TOBCD((info->tm_mon + 1));
break;
case 0x26:
ret = SCR2_TOBCD((info->tm_year - 100));
break;
}
if (ret & (0x80 >> (rtc->phase - 8))) {
scr2_2 |= SCR2_RTDATA;
}
rtc->retval = (rtc->retval << 1) |
((scr2_2 & SCR2_RTDATA) ? 1 : 0);
}
}
rtc->phase++;