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hw/arm/xlnx-versal: Connect the CFU_APB, CFU_FDRO and CFU_SFR

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Connect the Configuration Frame Unit (CFU_APB, CFU_FDRO and CFU_SFR) to
the Versal machine.

Signed-off-by: Francisco Iglesias <francisco.iglesias@amd.com>
Acked-by: Edgar E. Iglesias <edgar@zeroasic.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20230831165701.2016397-8-francisco.iglesias@amd.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Francisco Iglesias 2023-08-31 17:57:00 +01:00 • committed by Peter Maydell
parent eadd3343c4
commit b286d08aa1
2 changed files with 58 additions and 0 deletions
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42
hw/arm/xlnx-versal.c
View file

@ -570,6 +570,47 @@ static void versal_create_ospi(Versal *s, qemu_irq *pic)
qdev_connect_gpio_out(orgate, 0, pic[VERSAL_OSPI_IRQ]); qdev_connect_gpio_out(orgate, 0, pic[VERSAL_OSPI_IRQ]);
} }
static void versal_create_cfu(Versal *s, qemu_irq *pic)
{
SysBusDevice *sbd;
/* CFU FDRO */
object_initialize_child(OBJECT(s), "cfu-fdro", &s->pmc.cfu_fdro,
TYPE_XLNX_VERSAL_CFU_FDRO);
sbd = SYS_BUS_DEVICE(&s->pmc.cfu_fdro);
sysbus_realize(sbd, &error_fatal);
memory_region_add_subregion(&s->mr_ps, MM_PMC_CFU_FDRO,
sysbus_mmio_get_region(sbd, 0));
/* CFU APB */
object_initialize_child(OBJECT(s), "cfu-apb", &s->pmc.cfu_apb,
TYPE_XLNX_VERSAL_CFU_APB);
sbd = SYS_BUS_DEVICE(&s->pmc.cfu_apb);
sysbus_realize(sbd, &error_fatal);
memory_region_add_subregion(&s->mr_ps, MM_PMC_CFU_APB,
sysbus_mmio_get_region(sbd, 0));
memory_region_add_subregion(&s->mr_ps, MM_PMC_CFU_STREAM,
sysbus_mmio_get_region(sbd, 1));
memory_region_add_subregion(&s->mr_ps, MM_PMC_CFU_STREAM_2,
sysbus_mmio_get_region(sbd, 2));
sysbus_connect_irq(sbd, 0, pic[VERSAL_CFU_IRQ_0]);
/* CFU SFR */
object_initialize_child(OBJECT(s), "cfu-sfr", &s->pmc.cfu_sfr,
TYPE_XLNX_VERSAL_CFU_SFR);
sbd = SYS_BUS_DEVICE(&s->pmc.cfu_sfr);
object_property_set_link(OBJECT(&s->pmc.cfu_sfr),
"cfu", OBJECT(&s->pmc.cfu_apb), &error_abort);
sysbus_realize(sbd, &error_fatal);
memory_region_add_subregion(&s->mr_ps, MM_PMC_CFU_SFR,
sysbus_mmio_get_region(sbd, 0));
}
static void versal_create_crl(Versal *s, qemu_irq *pic) static void versal_create_crl(Versal *s, qemu_irq *pic)
{ {
SysBusDevice *sbd; SysBusDevice *sbd;
@ -763,6 +804,7 @@ static void versal_realize(DeviceState *dev, Error **errp)
versal_create_pmc_iou_slcr(s, pic); versal_create_pmc_iou_slcr(s, pic);
versal_create_ospi(s, pic); versal_create_ospi(s, pic);
versal_create_crl(s, pic); versal_create_crl(s, pic);
versal_create_cfu(s, pic);
versal_map_ddr(s); versal_map_ddr(s);
versal_unimp(s); versal_unimp(s);

16
include/hw/arm/xlnx-versal.h
View file

@ -32,6 +32,7 @@
#include "hw/misc/xlnx-versal-crl.h" #include "hw/misc/xlnx-versal-crl.h"
#include "hw/misc/xlnx-versal-pmc-iou-slcr.h" #include "hw/misc/xlnx-versal-pmc-iou-slcr.h"
#include "hw/net/xlnx-versal-canfd.h" #include "hw/net/xlnx-versal-canfd.h"
#include "hw/misc/xlnx-versal-cfu.h"
#define TYPE_XLNX_VERSAL "xlnx-versal" #define TYPE_XLNX_VERSAL "xlnx-versal"
OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL) OBJECT_DECLARE_SIMPLE_TYPE(Versal, XLNX_VERSAL)
@ -117,6 +118,9 @@ struct Versal {
XlnxEFuse efuse; XlnxEFuse efuse;
XlnxVersalEFuseCtrl efuse_ctrl; XlnxVersalEFuseCtrl efuse_ctrl;
XlnxVersalEFuseCache efuse_cache; XlnxVersalEFuseCache efuse_cache;
XlnxVersalCFUAPB cfu_apb;
XlnxVersalCFUFDRO cfu_fdro;
XlnxVersalCFUSFR cfu_sfr;
OrIRQState apb_irq_orgate; OrIRQState apb_irq_orgate;
} pmc; } pmc;
@ -147,6 +151,7 @@ struct Versal {
#define VERSAL_GEM1_WAKE_IRQ_0 59 #define VERSAL_GEM1_WAKE_IRQ_0 59
#define VERSAL_ADMA_IRQ_0 60 #define VERSAL_ADMA_IRQ_0 60
#define VERSAL_XRAM_IRQ_0 79 #define VERSAL_XRAM_IRQ_0 79
#define VERSAL_CFU_IRQ_0 120
#define VERSAL_PMC_APB_IRQ 121 #define VERSAL_PMC_APB_IRQ 121
#define VERSAL_OSPI_IRQ 124 #define VERSAL_OSPI_IRQ 124
#define VERSAL_SD0_IRQ_0 126 #define VERSAL_SD0_IRQ_0 126
@ -240,6 +245,17 @@ struct Versal {
#define MM_PMC_EFUSE_CACHE 0xf1250000 #define MM_PMC_EFUSE_CACHE 0xf1250000
#define MM_PMC_EFUSE_CACHE_SIZE 0x00C00 #define MM_PMC_EFUSE_CACHE_SIZE 0x00C00
#define MM_PMC_CFU_APB 0xf12b0000
#define MM_PMC_CFU_APB_SIZE 0x10000
#define MM_PMC_CFU_STREAM 0xf12c0000
#define MM_PMC_CFU_STREAM_SIZE 0x1000
#define MM_PMC_CFU_SFR 0xf12c1000
#define MM_PMC_CFU_SFR_SIZE 0x1000
#define MM_PMC_CFU_FDRO 0xf12c2000
#define MM_PMC_CFU_FDRO_SIZE 0x1000
#define MM_PMC_CFU_STREAM_2 0xf1f80000
#define MM_PMC_CFU_STREAM_2_SIZE 0x40000
#define MM_PMC_CRP 0xf1260000U #define MM_PMC_CRP 0xf1260000U
#define MM_PMC_CRP_SIZE 0x10000 #define MM_PMC_CRP_SIZE 0x10000
#define MM_PMC_RTC 0xf12a0000 #define MM_PMC_RTC 0xf12a0000