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target-i386: Use correct memory attributes for memory accesses
These include page table walks, SVM accesses and SMM state save accesses. The bulk of the patch is obtained with sed -i 's/\(\<[a-z_]*_phys\(_notdirty\)\?\>(cs\)->as,/x86_\1,/' Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini
parent
f794aa4a2f
commit
b216aa6c0f
5 changed files with 381 additions and 277 deletions
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@ -60,83 +60,83 @@ void do_smm_enter(X86CPU *cpu)
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for (i = 0; i < 6; i++) {
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dt = &env->segs[i];
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offset = 0x7e00 + i * 16;
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stw_phys(cs->as, sm_state + offset, dt->selector);
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stw_phys(cs->as, sm_state + offset + 2, (dt->flags >> 8) & 0xf0ff);
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stl_phys(cs->as, sm_state + offset + 4, dt->limit);
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stq_phys(cs->as, sm_state + offset + 8, dt->base);
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x86_stw_phys(cs, sm_state + offset, dt->selector);
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x86_stw_phys(cs, sm_state + offset + 2, (dt->flags >> 8) & 0xf0ff);
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x86_stl_phys(cs, sm_state + offset + 4, dt->limit);
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x86_stq_phys(cs, sm_state + offset + 8, dt->base);
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}
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stq_phys(cs->as, sm_state + 0x7e68, env->gdt.base);
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stl_phys(cs->as, sm_state + 0x7e64, env->gdt.limit);
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x86_stq_phys(cs, sm_state + 0x7e68, env->gdt.base);
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x86_stl_phys(cs, sm_state + 0x7e64, env->gdt.limit);
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stw_phys(cs->as, sm_state + 0x7e70, env->ldt.selector);
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stq_phys(cs->as, sm_state + 0x7e78, env->ldt.base);
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stl_phys(cs->as, sm_state + 0x7e74, env->ldt.limit);
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stw_phys(cs->as, sm_state + 0x7e72, (env->ldt.flags >> 8) & 0xf0ff);
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x86_stw_phys(cs, sm_state + 0x7e70, env->ldt.selector);
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x86_stq_phys(cs, sm_state + 0x7e78, env->ldt.base);
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x86_stl_phys(cs, sm_state + 0x7e74, env->ldt.limit);
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x86_stw_phys(cs, sm_state + 0x7e72, (env->ldt.flags >> 8) & 0xf0ff);
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stq_phys(cs->as, sm_state + 0x7e88, env->idt.base);
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stl_phys(cs->as, sm_state + 0x7e84, env->idt.limit);
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x86_stq_phys(cs, sm_state + 0x7e88, env->idt.base);
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x86_stl_phys(cs, sm_state + 0x7e84, env->idt.limit);
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stw_phys(cs->as, sm_state + 0x7e90, env->tr.selector);
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stq_phys(cs->as, sm_state + 0x7e98, env->tr.base);
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stl_phys(cs->as, sm_state + 0x7e94, env->tr.limit);
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stw_phys(cs->as, sm_state + 0x7e92, (env->tr.flags >> 8) & 0xf0ff);
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x86_stw_phys(cs, sm_state + 0x7e90, env->tr.selector);
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x86_stq_phys(cs, sm_state + 0x7e98, env->tr.base);
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x86_stl_phys(cs, sm_state + 0x7e94, env->tr.limit);
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x86_stw_phys(cs, sm_state + 0x7e92, (env->tr.flags >> 8) & 0xf0ff);
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stq_phys(cs->as, sm_state + 0x7ed0, env->efer);
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x86_stq_phys(cs, sm_state + 0x7ed0, env->efer);
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stq_phys(cs->as, sm_state + 0x7ff8, env->regs[R_EAX]);
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stq_phys(cs->as, sm_state + 0x7ff0, env->regs[R_ECX]);
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stq_phys(cs->as, sm_state + 0x7fe8, env->regs[R_EDX]);
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stq_phys(cs->as, sm_state + 0x7fe0, env->regs[R_EBX]);
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stq_phys(cs->as, sm_state + 0x7fd8, env->regs[R_ESP]);
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stq_phys(cs->as, sm_state + 0x7fd0, env->regs[R_EBP]);
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stq_phys(cs->as, sm_state + 0x7fc8, env->regs[R_ESI]);
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stq_phys(cs->as, sm_state + 0x7fc0, env->regs[R_EDI]);
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x86_stq_phys(cs, sm_state + 0x7ff8, env->regs[R_EAX]);
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x86_stq_phys(cs, sm_state + 0x7ff0, env->regs[R_ECX]);
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x86_stq_phys(cs, sm_state + 0x7fe8, env->regs[R_EDX]);
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x86_stq_phys(cs, sm_state + 0x7fe0, env->regs[R_EBX]);
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x86_stq_phys(cs, sm_state + 0x7fd8, env->regs[R_ESP]);
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x86_stq_phys(cs, sm_state + 0x7fd0, env->regs[R_EBP]);
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x86_stq_phys(cs, sm_state + 0x7fc8, env->regs[R_ESI]);
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x86_stq_phys(cs, sm_state + 0x7fc0, env->regs[R_EDI]);
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for (i = 8; i < 16; i++) {
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stq_phys(cs->as, sm_state + 0x7ff8 - i * 8, env->regs[i]);
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x86_stq_phys(cs, sm_state + 0x7ff8 - i * 8, env->regs[i]);
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}
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stq_phys(cs->as, sm_state + 0x7f78, env->eip);
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stl_phys(cs->as, sm_state + 0x7f70, cpu_compute_eflags(env));
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stl_phys(cs->as, sm_state + 0x7f68, env->dr[6]);
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stl_phys(cs->as, sm_state + 0x7f60, env->dr[7]);
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x86_stq_phys(cs, sm_state + 0x7f78, env->eip);
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x86_stl_phys(cs, sm_state + 0x7f70, cpu_compute_eflags(env));
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x86_stl_phys(cs, sm_state + 0x7f68, env->dr[6]);
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x86_stl_phys(cs, sm_state + 0x7f60, env->dr[7]);
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stl_phys(cs->as, sm_state + 0x7f48, env->cr[4]);
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stq_phys(cs->as, sm_state + 0x7f50, env->cr[3]);
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stl_phys(cs->as, sm_state + 0x7f58, env->cr[0]);
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x86_stl_phys(cs, sm_state + 0x7f48, env->cr[4]);
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x86_stq_phys(cs, sm_state + 0x7f50, env->cr[3]);
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x86_stl_phys(cs, sm_state + 0x7f58, env->cr[0]);
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stl_phys(cs->as, sm_state + 0x7efc, SMM_REVISION_ID);
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stl_phys(cs->as, sm_state + 0x7f00, env->smbase);
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x86_stl_phys(cs, sm_state + 0x7efc, SMM_REVISION_ID);
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x86_stl_phys(cs, sm_state + 0x7f00, env->smbase);
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#else
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stl_phys(cs->as, sm_state + 0x7ffc, env->cr[0]);
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stl_phys(cs->as, sm_state + 0x7ff8, env->cr[3]);
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stl_phys(cs->as, sm_state + 0x7ff4, cpu_compute_eflags(env));
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stl_phys(cs->as, sm_state + 0x7ff0, env->eip);
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stl_phys(cs->as, sm_state + 0x7fec, env->regs[R_EDI]);
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stl_phys(cs->as, sm_state + 0x7fe8, env->regs[R_ESI]);
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stl_phys(cs->as, sm_state + 0x7fe4, env->regs[R_EBP]);
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stl_phys(cs->as, sm_state + 0x7fe0, env->regs[R_ESP]);
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stl_phys(cs->as, sm_state + 0x7fdc, env->regs[R_EBX]);
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stl_phys(cs->as, sm_state + 0x7fd8, env->regs[R_EDX]);
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stl_phys(cs->as, sm_state + 0x7fd4, env->regs[R_ECX]);
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stl_phys(cs->as, sm_state + 0x7fd0, env->regs[R_EAX]);
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stl_phys(cs->as, sm_state + 0x7fcc, env->dr[6]);
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stl_phys(cs->as, sm_state + 0x7fc8, env->dr[7]);
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x86_stl_phys(cs, sm_state + 0x7ffc, env->cr[0]);
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x86_stl_phys(cs, sm_state + 0x7ff8, env->cr[3]);
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x86_stl_phys(cs, sm_state + 0x7ff4, cpu_compute_eflags(env));
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x86_stl_phys(cs, sm_state + 0x7ff0, env->eip);
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x86_stl_phys(cs, sm_state + 0x7fec, env->regs[R_EDI]);
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x86_stl_phys(cs, sm_state + 0x7fe8, env->regs[R_ESI]);
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x86_stl_phys(cs, sm_state + 0x7fe4, env->regs[R_EBP]);
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x86_stl_phys(cs, sm_state + 0x7fe0, env->regs[R_ESP]);
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x86_stl_phys(cs, sm_state + 0x7fdc, env->regs[R_EBX]);
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x86_stl_phys(cs, sm_state + 0x7fd8, env->regs[R_EDX]);
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x86_stl_phys(cs, sm_state + 0x7fd4, env->regs[R_ECX]);
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x86_stl_phys(cs, sm_state + 0x7fd0, env->regs[R_EAX]);
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x86_stl_phys(cs, sm_state + 0x7fcc, env->dr[6]);
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x86_stl_phys(cs, sm_state + 0x7fc8, env->dr[7]);
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stl_phys(cs->as, sm_state + 0x7fc4, env->tr.selector);
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stl_phys(cs->as, sm_state + 0x7f64, env->tr.base);
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stl_phys(cs->as, sm_state + 0x7f60, env->tr.limit);
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stl_phys(cs->as, sm_state + 0x7f5c, (env->tr.flags >> 8) & 0xf0ff);
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x86_stl_phys(cs, sm_state + 0x7fc4, env->tr.selector);
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x86_stl_phys(cs, sm_state + 0x7f64, env->tr.base);
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x86_stl_phys(cs, sm_state + 0x7f60, env->tr.limit);
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x86_stl_phys(cs, sm_state + 0x7f5c, (env->tr.flags >> 8) & 0xf0ff);
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stl_phys(cs->as, sm_state + 0x7fc0, env->ldt.selector);
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stl_phys(cs->as, sm_state + 0x7f80, env->ldt.base);
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stl_phys(cs->as, sm_state + 0x7f7c, env->ldt.limit);
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stl_phys(cs->as, sm_state + 0x7f78, (env->ldt.flags >> 8) & 0xf0ff);
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x86_stl_phys(cs, sm_state + 0x7fc0, env->ldt.selector);
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x86_stl_phys(cs, sm_state + 0x7f80, env->ldt.base);
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x86_stl_phys(cs, sm_state + 0x7f7c, env->ldt.limit);
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x86_stl_phys(cs, sm_state + 0x7f78, (env->ldt.flags >> 8) & 0xf0ff);
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stl_phys(cs->as, sm_state + 0x7f74, env->gdt.base);
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stl_phys(cs->as, sm_state + 0x7f70, env->gdt.limit);
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x86_stl_phys(cs, sm_state + 0x7f74, env->gdt.base);
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x86_stl_phys(cs, sm_state + 0x7f70, env->gdt.limit);
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stl_phys(cs->as, sm_state + 0x7f58, env->idt.base);
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stl_phys(cs->as, sm_state + 0x7f54, env->idt.limit);
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x86_stl_phys(cs, sm_state + 0x7f58, env->idt.base);
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x86_stl_phys(cs, sm_state + 0x7f54, env->idt.limit);
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for (i = 0; i < 6; i++) {
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dt = &env->segs[i];
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@ -145,15 +145,15 @@ void do_smm_enter(X86CPU *cpu)
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} else {
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offset = 0x7f2c + (i - 3) * 12;
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}
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stl_phys(cs->as, sm_state + 0x7fa8 + i * 4, dt->selector);
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stl_phys(cs->as, sm_state + offset + 8, dt->base);
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stl_phys(cs->as, sm_state + offset + 4, dt->limit);
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stl_phys(cs->as, sm_state + offset, (dt->flags >> 8) & 0xf0ff);
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x86_stl_phys(cs, sm_state + 0x7fa8 + i * 4, dt->selector);
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x86_stl_phys(cs, sm_state + offset + 8, dt->base);
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x86_stl_phys(cs, sm_state + offset + 4, dt->limit);
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x86_stl_phys(cs, sm_state + offset, (dt->flags >> 8) & 0xf0ff);
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}
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stl_phys(cs->as, sm_state + 0x7f14, env->cr[4]);
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x86_stl_phys(cs, sm_state + 0x7f14, env->cr[4]);
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stl_phys(cs->as, sm_state + 0x7efc, SMM_REVISION_ID);
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stl_phys(cs->as, sm_state + 0x7ef8, env->smbase);
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x86_stl_phys(cs, sm_state + 0x7efc, SMM_REVISION_ID);
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x86_stl_phys(cs, sm_state + 0x7ef8, env->smbase);
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#endif
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/* init SMM cpu state */
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@ -200,91 +200,91 @@ void helper_rsm(CPUX86State *env)
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sm_state = env->smbase + 0x8000;
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#ifdef TARGET_X86_64
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cpu_load_efer(env, ldq_phys(cs->as, sm_state + 0x7ed0));
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cpu_load_efer(env, x86_ldq_phys(cs, sm_state + 0x7ed0));
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env->gdt.base = ldq_phys(cs->as, sm_state + 0x7e68);
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env->gdt.limit = ldl_phys(cs->as, sm_state + 0x7e64);
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env->gdt.base = x86_ldq_phys(cs, sm_state + 0x7e68);
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env->gdt.limit = x86_ldl_phys(cs, sm_state + 0x7e64);
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env->ldt.selector = lduw_phys(cs->as, sm_state + 0x7e70);
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env->ldt.base = ldq_phys(cs->as, sm_state + 0x7e78);
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env->ldt.limit = ldl_phys(cs->as, sm_state + 0x7e74);
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env->ldt.flags = (lduw_phys(cs->as, sm_state + 0x7e72) & 0xf0ff) << 8;
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env->ldt.selector = x86_lduw_phys(cs, sm_state + 0x7e70);
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env->ldt.base = x86_ldq_phys(cs, sm_state + 0x7e78);
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env->ldt.limit = x86_ldl_phys(cs, sm_state + 0x7e74);
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env->ldt.flags = (x86_lduw_phys(cs, sm_state + 0x7e72) & 0xf0ff) << 8;
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env->idt.base = ldq_phys(cs->as, sm_state + 0x7e88);
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env->idt.limit = ldl_phys(cs->as, sm_state + 0x7e84);
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env->idt.base = x86_ldq_phys(cs, sm_state + 0x7e88);
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env->idt.limit = x86_ldl_phys(cs, sm_state + 0x7e84);
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env->tr.selector = lduw_phys(cs->as, sm_state + 0x7e90);
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env->tr.base = ldq_phys(cs->as, sm_state + 0x7e98);
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env->tr.limit = ldl_phys(cs->as, sm_state + 0x7e94);
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env->tr.flags = (lduw_phys(cs->as, sm_state + 0x7e92) & 0xf0ff) << 8;
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env->tr.selector = x86_lduw_phys(cs, sm_state + 0x7e90);
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env->tr.base = x86_ldq_phys(cs, sm_state + 0x7e98);
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env->tr.limit = x86_ldl_phys(cs, sm_state + 0x7e94);
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env->tr.flags = (x86_lduw_phys(cs, sm_state + 0x7e92) & 0xf0ff) << 8;
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env->regs[R_EAX] = ldq_phys(cs->as, sm_state + 0x7ff8);
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env->regs[R_ECX] = ldq_phys(cs->as, sm_state + 0x7ff0);
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env->regs[R_EDX] = ldq_phys(cs->as, sm_state + 0x7fe8);
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env->regs[R_EBX] = ldq_phys(cs->as, sm_state + 0x7fe0);
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env->regs[R_ESP] = ldq_phys(cs->as, sm_state + 0x7fd8);
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env->regs[R_EBP] = ldq_phys(cs->as, sm_state + 0x7fd0);
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env->regs[R_ESI] = ldq_phys(cs->as, sm_state + 0x7fc8);
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env->regs[R_EDI] = ldq_phys(cs->as, sm_state + 0x7fc0);
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env->regs[R_EAX] = x86_ldq_phys(cs, sm_state + 0x7ff8);
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env->regs[R_ECX] = x86_ldq_phys(cs, sm_state + 0x7ff0);
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env->regs[R_EDX] = x86_ldq_phys(cs, sm_state + 0x7fe8);
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env->regs[R_EBX] = x86_ldq_phys(cs, sm_state + 0x7fe0);
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env->regs[R_ESP] = x86_ldq_phys(cs, sm_state + 0x7fd8);
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env->regs[R_EBP] = x86_ldq_phys(cs, sm_state + 0x7fd0);
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env->regs[R_ESI] = x86_ldq_phys(cs, sm_state + 0x7fc8);
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env->regs[R_EDI] = x86_ldq_phys(cs, sm_state + 0x7fc0);
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for (i = 8; i < 16; i++) {
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env->regs[i] = ldq_phys(cs->as, sm_state + 0x7ff8 - i * 8);
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env->regs[i] = x86_ldq_phys(cs, sm_state + 0x7ff8 - i * 8);
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}
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env->eip = ldq_phys(cs->as, sm_state + 0x7f78);
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cpu_load_eflags(env, ldl_phys(cs->as, sm_state + 0x7f70),
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env->eip = x86_ldq_phys(cs, sm_state + 0x7f78);
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cpu_load_eflags(env, x86_ldl_phys(cs, sm_state + 0x7f70),
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~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK));
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env->dr[6] = ldl_phys(cs->as, sm_state + 0x7f68);
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env->dr[7] = ldl_phys(cs->as, sm_state + 0x7f60);
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env->dr[6] = x86_ldl_phys(cs, sm_state + 0x7f68);
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env->dr[7] = x86_ldl_phys(cs, sm_state + 0x7f60);
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cpu_x86_update_cr4(env, ldl_phys(cs->as, sm_state + 0x7f48));
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cpu_x86_update_cr3(env, ldq_phys(cs->as, sm_state + 0x7f50));
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cpu_x86_update_cr0(env, ldl_phys(cs->as, sm_state + 0x7f58));
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cpu_x86_update_cr4(env, x86_ldl_phys(cs, sm_state + 0x7f48));
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cpu_x86_update_cr3(env, x86_ldq_phys(cs, sm_state + 0x7f50));
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cpu_x86_update_cr0(env, x86_ldl_phys(cs, sm_state + 0x7f58));
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for (i = 0; i < 6; i++) {
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offset = 0x7e00 + i * 16;
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cpu_x86_load_seg_cache(env, i,
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lduw_phys(cs->as, sm_state + offset),
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ldq_phys(cs->as, sm_state + offset + 8),
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ldl_phys(cs->as, sm_state + offset + 4),
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(lduw_phys(cs->as, sm_state + offset + 2) &
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x86_lduw_phys(cs, sm_state + offset),
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x86_ldq_phys(cs, sm_state + offset + 8),
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x86_ldl_phys(cs, sm_state + offset + 4),
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(x86_lduw_phys(cs, sm_state + offset + 2) &
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0xf0ff) << 8);
|
||||
}
|
||||
|
||||
val = ldl_phys(cs->as, sm_state + 0x7efc); /* revision ID */
|
||||
val = x86_ldl_phys(cs, sm_state + 0x7efc); /* revision ID */
|
||||
if (val & 0x20000) {
|
||||
env->smbase = ldl_phys(cs->as, sm_state + 0x7f00) & ~0x7fff;
|
||||
env->smbase = x86_ldl_phys(cs, sm_state + 0x7f00) & ~0x7fff;
|
||||
}
|
||||
#else
|
||||
cpu_x86_update_cr0(env, ldl_phys(cs->as, sm_state + 0x7ffc));
|
||||
cpu_x86_update_cr3(env, ldl_phys(cs->as, sm_state + 0x7ff8));
|
||||
cpu_load_eflags(env, ldl_phys(cs->as, sm_state + 0x7ff4),
|
||||
cpu_x86_update_cr0(env, x86_ldl_phys(cs, sm_state + 0x7ffc));
|
||||
cpu_x86_update_cr3(env, x86_ldl_phys(cs, sm_state + 0x7ff8));
|
||||
cpu_load_eflags(env, x86_ldl_phys(cs, sm_state + 0x7ff4),
|
||||
~(CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C | DF_MASK));
|
||||
env->eip = ldl_phys(cs->as, sm_state + 0x7ff0);
|
||||
env->regs[R_EDI] = ldl_phys(cs->as, sm_state + 0x7fec);
|
||||
env->regs[R_ESI] = ldl_phys(cs->as, sm_state + 0x7fe8);
|
||||
env->regs[R_EBP] = ldl_phys(cs->as, sm_state + 0x7fe4);
|
||||
env->regs[R_ESP] = ldl_phys(cs->as, sm_state + 0x7fe0);
|
||||
env->regs[R_EBX] = ldl_phys(cs->as, sm_state + 0x7fdc);
|
||||
env->regs[R_EDX] = ldl_phys(cs->as, sm_state + 0x7fd8);
|
||||
env->regs[R_ECX] = ldl_phys(cs->as, sm_state + 0x7fd4);
|
||||
env->regs[R_EAX] = ldl_phys(cs->as, sm_state + 0x7fd0);
|
||||
env->dr[6] = ldl_phys(cs->as, sm_state + 0x7fcc);
|
||||
env->dr[7] = ldl_phys(cs->as, sm_state + 0x7fc8);
|
||||
env->eip = x86_ldl_phys(cs, sm_state + 0x7ff0);
|
||||
env->regs[R_EDI] = x86_ldl_phys(cs, sm_state + 0x7fec);
|
||||
env->regs[R_ESI] = x86_ldl_phys(cs, sm_state + 0x7fe8);
|
||||
env->regs[R_EBP] = x86_ldl_phys(cs, sm_state + 0x7fe4);
|
||||
env->regs[R_ESP] = x86_ldl_phys(cs, sm_state + 0x7fe0);
|
||||
env->regs[R_EBX] = x86_ldl_phys(cs, sm_state + 0x7fdc);
|
||||
env->regs[R_EDX] = x86_ldl_phys(cs, sm_state + 0x7fd8);
|
||||
env->regs[R_ECX] = x86_ldl_phys(cs, sm_state + 0x7fd4);
|
||||
env->regs[R_EAX] = x86_ldl_phys(cs, sm_state + 0x7fd0);
|
||||
env->dr[6] = x86_ldl_phys(cs, sm_state + 0x7fcc);
|
||||
env->dr[7] = x86_ldl_phys(cs, sm_state + 0x7fc8);
|
||||
|
||||
env->tr.selector = ldl_phys(cs->as, sm_state + 0x7fc4) & 0xffff;
|
||||
env->tr.base = ldl_phys(cs->as, sm_state + 0x7f64);
|
||||
env->tr.limit = ldl_phys(cs->as, sm_state + 0x7f60);
|
||||
env->tr.flags = (ldl_phys(cs->as, sm_state + 0x7f5c) & 0xf0ff) << 8;
|
||||
env->tr.selector = x86_ldl_phys(cs, sm_state + 0x7fc4) & 0xffff;
|
||||
env->tr.base = x86_ldl_phys(cs, sm_state + 0x7f64);
|
||||
env->tr.limit = x86_ldl_phys(cs, sm_state + 0x7f60);
|
||||
env->tr.flags = (x86_ldl_phys(cs, sm_state + 0x7f5c) & 0xf0ff) << 8;
|
||||
|
||||
env->ldt.selector = ldl_phys(cs->as, sm_state + 0x7fc0) & 0xffff;
|
||||
env->ldt.base = ldl_phys(cs->as, sm_state + 0x7f80);
|
||||
env->ldt.limit = ldl_phys(cs->as, sm_state + 0x7f7c);
|
||||
env->ldt.flags = (ldl_phys(cs->as, sm_state + 0x7f78) & 0xf0ff) << 8;
|
||||
env->ldt.selector = x86_ldl_phys(cs, sm_state + 0x7fc0) & 0xffff;
|
||||
env->ldt.base = x86_ldl_phys(cs, sm_state + 0x7f80);
|
||||
env->ldt.limit = x86_ldl_phys(cs, sm_state + 0x7f7c);
|
||||
env->ldt.flags = (x86_ldl_phys(cs, sm_state + 0x7f78) & 0xf0ff) << 8;
|
||||
|
||||
env->gdt.base = ldl_phys(cs->as, sm_state + 0x7f74);
|
||||
env->gdt.limit = ldl_phys(cs->as, sm_state + 0x7f70);
|
||||
env->gdt.base = x86_ldl_phys(cs, sm_state + 0x7f74);
|
||||
env->gdt.limit = x86_ldl_phys(cs, sm_state + 0x7f70);
|
||||
|
||||
env->idt.base = ldl_phys(cs->as, sm_state + 0x7f58);
|
||||
env->idt.limit = ldl_phys(cs->as, sm_state + 0x7f54);
|
||||
env->idt.base = x86_ldl_phys(cs, sm_state + 0x7f58);
|
||||
env->idt.limit = x86_ldl_phys(cs, sm_state + 0x7f54);
|
||||
|
||||
for (i = 0; i < 6; i++) {
|
||||
if (i < 3) {
|
||||
|
|
@ -293,18 +293,18 @@ void helper_rsm(CPUX86State *env)
|
|||
offset = 0x7f2c + (i - 3) * 12;
|
||||
}
|
||||
cpu_x86_load_seg_cache(env, i,
|
||||
ldl_phys(cs->as,
|
||||
x86_ldl_phys(cs,
|
||||
sm_state + 0x7fa8 + i * 4) & 0xffff,
|
||||
ldl_phys(cs->as, sm_state + offset + 8),
|
||||
ldl_phys(cs->as, sm_state + offset + 4),
|
||||
(ldl_phys(cs->as,
|
||||
x86_ldl_phys(cs, sm_state + offset + 8),
|
||||
x86_ldl_phys(cs, sm_state + offset + 4),
|
||||
(x86_ldl_phys(cs,
|
||||
sm_state + offset) & 0xf0ff) << 8);
|
||||
}
|
||||
cpu_x86_update_cr4(env, ldl_phys(cs->as, sm_state + 0x7f14));
|
||||
cpu_x86_update_cr4(env, x86_ldl_phys(cs, sm_state + 0x7f14));
|
||||
|
||||
val = ldl_phys(cs->as, sm_state + 0x7efc); /* revision ID */
|
||||
val = x86_ldl_phys(cs, sm_state + 0x7efc); /* revision ID */
|
||||
if (val & 0x20000) {
|
||||
env->smbase = ldl_phys(cs->as, sm_state + 0x7ef8) & ~0x7fff;
|
||||
env->smbase = x86_ldl_phys(cs, sm_state + 0x7ef8) & ~0x7fff;
|
||||
}
|
||||
#endif
|
||||
env->hflags &= ~HF_SMM_MASK;
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue