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ppc patch queue for 2022-04-20
First batch of ppc patches for QEMU 7.1: - skiboot firmware version bump - pseries: add 2M DDW pagesize - pseries: make virtual hypervisor code TCG only - powernv: introduce GPIO lines for PSIHB device - powernv: remove PCIE root bridge LSI - target/ppc: alternative softfloat 128 bit integer support - assorted fixes -----BEGIN PGP SIGNATURE----- iHUEABYKAB0WIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCYmB/ngAKCRA82cqW3gMx ZE10AP4wPeJQ3fxXb5ylVtL4qkJaLWy6VrJBQSKSb5YEA0fhegEA9ZufpnENQePU gZF0eFAQK/DbSnDyvRQVpGcJM0K1UgI= =nVRw -----END PGP SIGNATURE----- Merge tag 'pull-ppc-20220420-2' of https://gitlab.com/danielhb/qemu into staging ppc patch queue for 2022-04-20 First batch of ppc patches for QEMU 7.1: - skiboot firmware version bump - pseries: add 2M DDW pagesize - pseries: make virtual hypervisor code TCG only - powernv: introduce GPIO lines for PSIHB device - powernv: remove PCIE root bridge LSI - target/ppc: alternative softfloat 128 bit integer support - assorted fixes # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCYmB/ngAKCRA82cqW3gMx # ZE10AP4wPeJQ3fxXb5ylVtL4qkJaLWy6VrJBQSKSb5YEA0fhegEA9ZufpnENQePU # gZF0eFAQK/DbSnDyvRQVpGcJM0K1UgI= # =nVRw # -----END PGP SIGNATURE----- # gpg: Signature made Wed 20 Apr 2022 02:48:14 PM PDT # gpg: using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164 # gpg: Can't check signature: No public key * tag 'pull-ppc-20220420-2' of https://gitlab.com/danielhb/qemu: (23 commits) hw/ppc: change indentation to spaces from TABs target/ppc: Add two missing register callbacks on POWER10 ppc/pnv: Remove LSI on the PCIE host bridge pcie: Don't try triggering a LSI when not defined ppc/vof: Fix uninitialized string tracing hw/ppc/ppc405_boards: Initialize g_autofree pointer target/ppc: implement xscvqp[su]qz target/ppc: implement xscv[su]qqp softfloat: add float128_to_int128 softfloat: add float128_to_uint128 softfloat: add int128_to_float128 softfloat: add uint128_to_float128 qemu/int128: add int128_urshift target/ppc: Improve KVM hypercall trace spapr: Move nested KVM hypercalls under a TCG only config. spapr: Move hypercall_register_softmmu ppc/pnv: Remove useless checks in set_irq handlers ppc/pnv: Remove PnvPsiClas::irq_set ppc/pnv: Remove PnvOCC::psi link ppc/pnv: Remove PnvLpcController::psi link ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
commit
b1efff6bf0
32 changed files with 446 additions and 137 deletions
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@ -206,6 +206,55 @@ static void test_rshift(void)
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test_rshift_one(0xFFFE8000U, 0, 0xFFFFFFFFFFFFFFFEULL, 0x8000000000000000ULL);
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}
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static void __attribute__((__noinline__)) ATTRIBUTE_NOCLONE
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test_urshift_one(uint32_t x, int n, uint64_t h, uint64_t l)
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{
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Int128 a = expand(x);
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Int128 r = int128_urshift(a, n);
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g_assert_cmpuint(int128_getlo(r), ==, l);
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g_assert_cmpuint(int128_gethi(r), ==, h);
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}
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static void test_urshift(void)
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{
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test_urshift_one(0x00010000U, 64, 0x0000000000000000ULL,
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0x0000000000000001ULL);
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test_urshift_one(0x80010000U, 64, 0x0000000000000000ULL,
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0x8000000000000001ULL);
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test_urshift_one(0x7FFE0000U, 64, 0x0000000000000000ULL,
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0x7FFFFFFFFFFFFFFEULL);
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test_urshift_one(0xFFFE0000U, 64, 0x0000000000000000ULL,
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0xFFFFFFFFFFFFFFFEULL);
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test_urshift_one(0x00010000U, 60, 0x0000000000000000ULL,
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0x0000000000000010ULL);
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test_urshift_one(0x80010000U, 60, 0x0000000000000008ULL,
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0x0000000000000010ULL);
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test_urshift_one(0x00018000U, 60, 0x0000000000000000ULL,
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0x0000000000000018ULL);
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test_urshift_one(0x80018000U, 60, 0x0000000000000008ULL,
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0x0000000000000018ULL);
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test_urshift_one(0x7FFE0000U, 60, 0x0000000000000007ULL,
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0xFFFFFFFFFFFFFFE0ULL);
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test_urshift_one(0xFFFE0000U, 60, 0x000000000000000FULL,
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0xFFFFFFFFFFFFFFE0ULL);
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test_urshift_one(0x7FFE8000U, 60, 0x0000000000000007ULL,
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0xFFFFFFFFFFFFFFE8ULL);
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test_urshift_one(0xFFFE8000U, 60, 0x000000000000000FULL,
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0xFFFFFFFFFFFFFFE8ULL);
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test_urshift_one(0x00018000U, 0, 0x0000000000000001ULL,
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0x8000000000000000ULL);
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test_urshift_one(0x80018000U, 0, 0x8000000000000001ULL,
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0x8000000000000000ULL);
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test_urshift_one(0x7FFE0000U, 0, 0x7FFFFFFFFFFFFFFEULL,
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0x0000000000000000ULL);
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test_urshift_one(0xFFFE0000U, 0, 0xFFFFFFFFFFFFFFFEULL,
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0x0000000000000000ULL);
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test_urshift_one(0x7FFE8000U, 0, 0x7FFFFFFFFFFFFFFEULL,
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0x8000000000000000ULL);
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test_urshift_one(0xFFFE8000U, 0, 0xFFFFFFFFFFFFFFFEULL,
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0x8000000000000000ULL);
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}
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int main(int argc, char **argv)
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{
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g_test_init(&argc, &argv, NULL);
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@ -219,5 +268,6 @@ int main(int argc, char **argv)
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g_test_add_func("/int128/int128_ge", test_ge);
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g_test_add_func("/int128/int128_gt", test_gt);
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g_test_add_func("/int128/int128_rshift", test_rshift);
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g_test_add_func("/int128/int128_urshift", test_urshift);
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return g_test_run();
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}
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