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https://github.com/Motorhead1991/qemu.git
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vga: convert vga and its derivatives to the memory API
Convert all vga memory to the memory API. Note we need to fall back to get_system_memory(), since the various buses don't pass the vga window as a memory region. We no longer need to sync the dirty bitmap of the cirrus mapped memory banks, since the memory API takes care of that for us. [jan: fix vga-pci logging] Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Avi Kivity
Anthony Liguori
parent
7b619b9ae5
commit
b195043003
10 changed files with 440 additions and 438 deletions
135
hw/qxl.c
135
hw/qxl.c
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@ -263,7 +263,7 @@ static ram_addr_t qxl_rom_size(void)
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static void init_qxl_rom(PCIQXLDevice *d)
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{
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QXLRom *rom = qemu_get_ram_ptr(d->rom_offset);
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QXLRom *rom = memory_region_get_ram_ptr(&d->rom_bar);
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QXLModes *modes = (QXLModes *)(rom + 1);
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uint32_t ram_header_size;
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uint32_t surface0_area_size;
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@ -339,39 +339,37 @@ static void init_qxl_ram(PCIQXLDevice *d)
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}
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/* can be called from spice server thread context */
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static void qxl_set_dirty(ram_addr_t addr, ram_addr_t end)
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static void qxl_set_dirty(MemoryRegion *mr, ram_addr_t addr, ram_addr_t end)
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{
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while (addr < end) {
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cpu_physical_memory_set_dirty(addr);
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memory_region_set_dirty(mr, addr);
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addr += TARGET_PAGE_SIZE;
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}
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}
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static void qxl_rom_set_dirty(PCIQXLDevice *qxl)
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{
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ram_addr_t addr = qxl->rom_offset;
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qxl_set_dirty(addr, addr + qxl->rom_size);
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qxl_set_dirty(&qxl->rom_bar, 0, qxl->rom_size);
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}
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/* called from spice server thread context only */
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static void qxl_ram_set_dirty(PCIQXLDevice *qxl, void *ptr)
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{
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ram_addr_t addr = qxl->vga.vram_offset;
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void *base = qxl->vga.vram_ptr;
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intptr_t offset;
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offset = ptr - base;
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offset &= ~(TARGET_PAGE_SIZE-1);
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assert(offset < qxl->vga.vram_size);
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qxl_set_dirty(addr + offset, addr + offset + TARGET_PAGE_SIZE);
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qxl_set_dirty(&qxl->vga.vram, offset, offset + TARGET_PAGE_SIZE);
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}
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/* can be called from spice server thread context */
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static void qxl_ring_set_dirty(PCIQXLDevice *qxl)
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{
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ram_addr_t addr = qxl->vga.vram_offset + qxl->shadow_rom.ram_header_offset;
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ram_addr_t end = qxl->vga.vram_offset + qxl->vga.vram_size;
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qxl_set_dirty(addr, end);
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ram_addr_t addr = qxl->shadow_rom.ram_header_offset;
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ram_addr_t end = qxl->vga.vram_size;
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qxl_set_dirty(&qxl->vga.vram, addr, end);
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}
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/*
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@ -819,20 +817,6 @@ static void qxl_set_irq(PCIQXLDevice *d)
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qxl_ring_set_dirty(d);
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}
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static void qxl_write_config(PCIDevice *d, uint32_t address,
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uint32_t val, int len)
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{
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PCIQXLDevice *qxl = DO_UPCAST(PCIQXLDevice, pci, d);
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VGACommonState *vga = &qxl->vga;
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vga_dirty_log_stop(vga);
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pci_default_write_config(d, address, val, len);
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if (vga->map_addr && qxl->pci.io_regions[0].addr == -1) {
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vga->map_addr = 0;
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}
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vga_dirty_log_start(vga);
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}
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static void qxl_check_state(PCIQXLDevice *d)
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{
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QXLRam *ram = d->ram;
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@ -959,10 +943,10 @@ static void qxl_add_memslot(PCIQXLDevice *d, uint32_t slot_id, uint64_t delta,
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switch (pci_region) {
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case QXL_RAM_RANGE_INDEX:
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virt_start = (intptr_t)qemu_get_ram_ptr(d->vga.vram_offset);
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virt_start = (intptr_t)memory_region_get_ram_ptr(&d->vga.vram);
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break;
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case QXL_VRAM_RANGE_INDEX:
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virt_start = (intptr_t)qemu_get_ram_ptr(d->vram_offset);
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virt_start = (intptr_t)memory_region_get_ram_ptr(&d->vram_bar);
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break;
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default:
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/* should not happen */
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@ -1132,10 +1116,11 @@ static void qxl_set_mode(PCIQXLDevice *d, int modenr, int loadvm)
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qxl_rom_set_dirty(d);
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}
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static void ioport_write(void *opaque, uint32_t addr, uint32_t val)
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static void ioport_write(void *opaque, target_phys_addr_t addr,
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uint64_t val, unsigned size)
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{
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PCIQXLDevice *d = opaque;
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uint32_t io_port = addr - d->io_base;
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uint32_t io_port = addr;
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qxl_async_io async = QXL_SYNC;
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#if SPICE_INTERFACE_QXL_MINOR >= 1
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uint32_t orig_io_port = io_port;
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@ -1241,7 +1226,7 @@ async_common:
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d->oom_running = 0;
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break;
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case QXL_IO_SET_MODE:
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dprint(d, 1, "QXL_SET_MODE %d\n", val);
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dprint(d, 1, "QXL_SET_MODE %d\n", (int)val);
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qxl_set_mode(d, val, 0);
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break;
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case QXL_IO_LOG:
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@ -1348,7 +1333,8 @@ cancel_async:
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#endif
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}
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static uint32_t ioport_read(void *opaque, uint32_t addr)
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static uint64_t ioport_read(void *opaque, target_phys_addr_t addr,
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unsigned size)
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{
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PCIQXLDevice *d = opaque;
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@ -1356,42 +1342,14 @@ static uint32_t ioport_read(void *opaque, uint32_t addr)
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return 0xff;
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}
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static void qxl_map(PCIDevice *pci, int region_num,
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pcibus_t addr, pcibus_t size, int type)
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{
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static const char *names[] = {
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[ QXL_IO_RANGE_INDEX ] = "ioports",
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[ QXL_RAM_RANGE_INDEX ] = "devram",
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[ QXL_ROM_RANGE_INDEX ] = "rom",
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[ QXL_VRAM_RANGE_INDEX ] = "vram",
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};
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PCIQXLDevice *qxl = DO_UPCAST(PCIQXLDevice, pci, pci);
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dprint(qxl, 1, "%s: bar %d [%s] addr 0x%lx size 0x%lx\n", __FUNCTION__,
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region_num, names[region_num], addr, size);
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switch (region_num) {
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case QXL_IO_RANGE_INDEX:
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register_ioport_write(addr, size, 1, ioport_write, pci);
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register_ioport_read(addr, size, 1, ioport_read, pci);
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qxl->io_base = addr;
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break;
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case QXL_RAM_RANGE_INDEX:
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cpu_register_physical_memory(addr, size, qxl->vga.vram_offset | IO_MEM_RAM);
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qxl->vga.map_addr = addr;
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qxl->vga.map_end = addr + size;
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if (qxl->id == 0) {
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vga_dirty_log_start(&qxl->vga);
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}
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break;
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case QXL_ROM_RANGE_INDEX:
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cpu_register_physical_memory(addr, size, qxl->rom_offset | IO_MEM_ROM);
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break;
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case QXL_VRAM_RANGE_INDEX:
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cpu_register_physical_memory(addr, size, qxl->vram_offset | IO_MEM_RAM);
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break;
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}
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}
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static const MemoryRegionOps qxl_io_ops = {
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.read = ioport_read,
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.write = ioport_write,
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.valid = {
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.min_access_size = 1,
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.max_access_size = 1,
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},
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};
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static void pipe_read(void *opaque)
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{
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@ -1511,10 +1469,9 @@ static void qxl_vm_change_state_handler(void *opaque, int running, int reason)
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* to make sure they are saved */
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/* FIXME #1: should go out during "live" stage */
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/* FIXME #2: we only need to save the areas which are actually used */
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ram_addr_t vram_addr = qxl->vram_offset;
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ram_addr_t surface0_addr = qxl->vga.vram_offset + qxl->shadow_rom.draw_area_offset;
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qxl_set_dirty(vram_addr, vram_addr + qxl->vram_size);
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qxl_set_dirty(surface0_addr, surface0_addr + qxl->shadow_rom.surface0_area_size);
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qxl_set_dirty(&qxl->vram_bar, 0, qxl->vram_size);
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qxl_set_dirty(&qxl->vga.vram, qxl->shadow_rom.draw_area_offset,
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qxl->shadow_rom.surface0_area_size);
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}
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}
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@ -1580,7 +1537,8 @@ static int qxl_init_common(PCIQXLDevice *qxl)
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pci_set_byte(&config[PCI_INTERRUPT_PIN], 1);
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qxl->rom_size = qxl_rom_size();
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qxl->rom_offset = qemu_ram_alloc(&qxl->pci.qdev, "qxl.vrom", qxl->rom_size);
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memory_region_init_ram(&qxl->rom_bar, &qxl->pci.qdev, "qxl.vrom",
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qxl->rom_size);
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init_qxl_rom(qxl);
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init_qxl_ram(qxl);
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@ -1591,26 +1549,32 @@ static int qxl_init_common(PCIQXLDevice *qxl)
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qxl->vram_size = 4096;
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}
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qxl->vram_size = msb_mask(qxl->vram_size * 2 - 1);
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qxl->vram_offset = qemu_ram_alloc(&qxl->pci.qdev, "qxl.vram", qxl->vram_size);
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memory_region_init_ram(&qxl->vram_bar, &qxl->pci.qdev, "qxl.vram",
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qxl->vram_size);
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io_size = msb_mask(QXL_IO_RANGE_SIZE * 2 - 1);
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if (qxl->revision == 1) {
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io_size = 8;
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}
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pci_register_bar(&qxl->pci, QXL_IO_RANGE_INDEX,
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io_size, PCI_BASE_ADDRESS_SPACE_IO, qxl_map);
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memory_region_init_io(&qxl->io_bar, &qxl_io_ops, qxl,
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"qxl-ioports", io_size);
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if (qxl->id == 0) {
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vga_dirty_log_start(&qxl->vga);
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}
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pci_register_bar(&qxl->pci, QXL_ROM_RANGE_INDEX,
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qxl->rom_size, PCI_BASE_ADDRESS_SPACE_MEMORY,
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qxl_map);
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pci_register_bar(&qxl->pci, QXL_RAM_RANGE_INDEX,
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qxl->vga.vram_size, PCI_BASE_ADDRESS_SPACE_MEMORY,
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qxl_map);
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pci_register_bar_region(&qxl->pci, QXL_IO_RANGE_INDEX,
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PCI_BASE_ADDRESS_SPACE_IO, &qxl->io_bar);
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pci_register_bar(&qxl->pci, QXL_VRAM_RANGE_INDEX, qxl->vram_size,
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PCI_BASE_ADDRESS_SPACE_MEMORY, qxl_map);
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pci_register_bar_region(&qxl->pci, QXL_ROM_RANGE_INDEX,
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PCI_BASE_ADDRESS_SPACE_MEMORY, &qxl->rom_bar);
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pci_register_bar_region(&qxl->pci, QXL_RAM_RANGE_INDEX,
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PCI_BASE_ADDRESS_SPACE_MEMORY, &qxl->vga.vram);
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pci_register_bar_region(&qxl->pci, QXL_VRAM_RANGE_INDEX,
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PCI_BASE_ADDRESS_SPACE_MEMORY, &qxl->vram_bar);
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qxl->ssd.qxl.base.sif = &qxl_interface.base;
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qxl->ssd.qxl.id = qxl->id;
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@ -1664,9 +1628,9 @@ static int qxl_init_secondary(PCIDevice *dev)
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ram_size = 16 * 1024 * 1024;
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}
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qxl->vga.vram_size = ram_size;
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qxl->vga.vram_offset = qemu_ram_alloc(&qxl->pci.qdev, "qxl.vgavram",
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qxl->vga.vram_size);
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qxl->vga.vram_ptr = qemu_get_ram_ptr(qxl->vga.vram_offset);
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memory_region_init_ram(&qxl->vga.vram, &qxl->pci.qdev, "qxl.vgavram",
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qxl->vga.vram_size);
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qxl->vga.vram_ptr = memory_region_get_ram_ptr(&qxl->vga.vram);
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return qxl_init_common(qxl);
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}
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@ -1829,7 +1793,6 @@ static PCIDeviceInfo qxl_info_primary = {
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.qdev.vmsd = &qxl_vmstate,
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.no_hotplug = 1,
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.init = qxl_init_primary,
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.config_write = qxl_write_config,
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.romfile = "vgabios-qxl.bin",
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.vendor_id = REDHAT_PCI_VENDOR_ID,
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.device_id = QXL_DEVICE_ID_STABLE,
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