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ppc/pnv: Remove PnvOCC::psi link

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Use an anonymous output GPIO line to connect the OCC device with the
PSIHB device and raise the appropriate PSI IRQ line depending on the
processor model.

Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20220323072846.1780212-4-clg@kaod.org>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
This commit is contained in:
Cédric Le Goater 2022-03-23 08:28:44 +01:00 • committed by Daniel Henrique Barboza
parent c05aa1406b
commit b0ae5c69e1
3 changed files with 12 additions and 23 deletions
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7
include/hw/ppc/pnv_occ.h
View file

@ -1,7 +1,7 @@
/*
* QEMU PowerPC PowerNV Emulation of a few OCC related registers
*
* Copyright (c) 2015-2017, IBM Corporation.
* Copyright (c) 2015-2022, IBM Corporation.
*
* This library is free software; you can redistribute it and/or
* modify it under the terms of the GNU Lesser General Public
@ -20,7 +20,6 @@
#ifndef PPC_PNV_OCC_H
#define PPC_PNV_OCC_H
#include "hw/ppc/pnv_psi.h"
#include "qom/object.h"
#define TYPE_PNV_OCC "pnv-occ"
@ -44,19 +43,17 @@ struct PnvOCC {
/* OCC Misc interrupt */
uint64_t occmisc;
PnvPsi *psi;
qemu_irq psi_irq;
MemoryRegion xscom_regs;
MemoryRegion sram_regs;
};
struct PnvOCCClass {
DeviceClass parent_class;
int xscom_size;
const MemoryRegionOps *xscom_ops;
int psi_irq;
};
#define PNV_OCC_SENSOR_DATA_BLOCK_BASE(i) \