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ioports: remove unused env parameter and compile only once

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The CPU state parameter is not used, remove it and adjust callers. Now we
can compile ioport.c once for all targets.

Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Blue Swirl 2009-09-20 16:05:47 +00:00
parent 5e520a7d50
commit afcea8cbde
13 changed files with 69 additions and 75 deletions
Download patch file Download diff file Expand all files Collapse all files

12
hw/apb_pci.c
View file

@ -151,26 +151,26 @@ static CPUReadMemoryFunc * const pci_apb_read[] = {
static void pci_apb_iowriteb (void *opaque, target_phys_addr_t addr,
uint32_t val)
{
cpu_outb(NULL, addr & IOPORTS_MASK, val);
cpu_outb(addr & IOPORTS_MASK, val);
}
static void pci_apb_iowritew (void *opaque, target_phys_addr_t addr,
uint32_t val)
{
cpu_outw(NULL, addr & IOPORTS_MASK, val);
cpu_outw(addr & IOPORTS_MASK, val);
}
static void pci_apb_iowritel (void *opaque, target_phys_addr_t addr,
uint32_t val)
{
cpu_outl(NULL, addr & IOPORTS_MASK, val);
cpu_outl(addr & IOPORTS_MASK, val);
}
static uint32_t pci_apb_ioreadb (void *opaque, target_phys_addr_t addr)
{
uint32_t val;
val = cpu_inb(NULL, addr & IOPORTS_MASK);
val = cpu_inb(addr & IOPORTS_MASK);
return val;
}
@ -178,7 +178,7 @@ static uint32_t pci_apb_ioreadw (void *opaque, target_phys_addr_t addr)
{
uint32_t val;
val = cpu_inw(NULL, addr & IOPORTS_MASK);
val = cpu_inw(addr & IOPORTS_MASK);
return val;
}
@ -186,7 +186,7 @@ static uint32_t pci_apb_ioreadl (void *opaque, target_phys_addr_t addr)
{
uint32_t val;
val = cpu_inl(NULL, addr & IOPORTS_MASK);
val = cpu_inl(addr & IOPORTS_MASK);
return val;
}

12
hw/isa_mmio.c
View file

@ -28,7 +28,7 @@
static void isa_mmio_writeb (void *opaque, target_phys_addr_t addr,
uint32_t val)
{
cpu_outb(NULL, addr & IOPORTS_MASK, val);
cpu_outb(addr & IOPORTS_MASK, val);
}
static void isa_mmio_writew (void *opaque, target_phys_addr_t addr,
@ -37,7 +37,7 @@ static void isa_mmio_writew (void *opaque, target_phys_addr_t addr,
#ifdef TARGET_WORDS_BIGENDIAN
val = bswap16(val);
#endif
cpu_outw(NULL, addr & IOPORTS_MASK, val);
cpu_outw(addr & IOPORTS_MASK, val);
}
static void isa_mmio_writel (void *opaque, target_phys_addr_t addr,
@ -46,14 +46,14 @@ static void isa_mmio_writel (void *opaque, target_phys_addr_t addr,
#ifdef TARGET_WORDS_BIGENDIAN
val = bswap32(val);
#endif
cpu_outl(NULL, addr & IOPORTS_MASK, val);
cpu_outl(addr & IOPORTS_MASK, val);
}
static uint32_t isa_mmio_readb (void *opaque, target_phys_addr_t addr)
{
uint32_t val;
val = cpu_inb(NULL, addr & IOPORTS_MASK);
val = cpu_inb(addr & IOPORTS_MASK);
return val;
}
@ -61,7 +61,7 @@ static uint32_t isa_mmio_readw (void *opaque, target_phys_addr_t addr)
{
uint32_t val;
val = cpu_inw(NULL, addr & IOPORTS_MASK);
val = cpu_inw(addr & IOPORTS_MASK);
#ifdef TARGET_WORDS_BIGENDIAN
val = bswap16(val);
#endif
@ -72,7 +72,7 @@ static uint32_t isa_mmio_readl (void *opaque, target_phys_addr_t addr)
{
uint32_t val;
val = cpu_inl(NULL, addr & IOPORTS_MASK);
val = cpu_inl(addr & IOPORTS_MASK);
#ifdef TARGET_WORDS_BIGENDIAN
val = bswap32(val);
#endif

8
hw/mips_jazz.c
View file

@ -49,14 +49,12 @@ static void main_cpu_reset(void *opaque)
static uint32_t rtc_readb(void *opaque, target_phys_addr_t addr)
{
CPUState *env = opaque;
return cpu_inw(env, 0x71);
return cpu_inw(0x71);
}
static void rtc_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
{
CPUState *env = opaque;
cpu_outw(env, 0x71, val & 0xff);
cpu_outw(0x71, val & 0xff);
}
static CPUReadMemoryFunc * const rtc_read[3] = {
@ -243,7 +241,7 @@ void mips_jazz_init (ram_addr_t ram_size,
/* Real time clock */
rtc_init(1980);
s_rtc = cpu_register_io_memory(rtc_read, rtc_write, env);
s_rtc = cpu_register_io_memory(rtc_read, rtc_write, NULL);
cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc);
/* Keyboard (i8042) */

12
hw/ppc_prep.c
View file

@ -460,7 +460,7 @@ static void PPC_prep_io_writeb (void *opaque, target_phys_addr_t addr,
sysctrl_t *sysctrl = opaque;
addr = prep_IO_address(sysctrl, addr);
cpu_outb(NULL, addr, value);
cpu_outb(addr, value);
}
static uint32_t PPC_prep_io_readb (void *opaque, target_phys_addr_t addr)
@ -469,7 +469,7 @@ static uint32_t PPC_prep_io_readb (void *opaque, target_phys_addr_t addr)
uint32_t ret;
addr = prep_IO_address(sysctrl, addr);
ret = cpu_inb(NULL, addr);
ret = cpu_inb(addr);
return ret;
}
@ -484,7 +484,7 @@ static void PPC_prep_io_writew (void *opaque, target_phys_addr_t addr,
value = bswap16(value);
#endif
PPC_IO_DPRINTF("0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", addr, value);
cpu_outw(NULL, addr, value);
cpu_outw(addr, value);
}
static uint32_t PPC_prep_io_readw (void *opaque, target_phys_addr_t addr)
@ -493,7 +493,7 @@ static uint32_t PPC_prep_io_readw (void *opaque, target_phys_addr_t addr)
uint32_t ret;
addr = prep_IO_address(sysctrl, addr);
ret = cpu_inw(NULL, addr);
ret = cpu_inw(addr);
#ifdef TARGET_WORDS_BIGENDIAN
ret = bswap16(ret);
#endif
@ -512,7 +512,7 @@ static void PPC_prep_io_writel (void *opaque, target_phys_addr_t addr,
value = bswap32(value);
#endif
PPC_IO_DPRINTF("0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", addr, value);
cpu_outl(NULL, addr, value);
cpu_outl(addr, value);
}
static uint32_t PPC_prep_io_readl (void *opaque, target_phys_addr_t addr)
@ -521,7 +521,7 @@ static uint32_t PPC_prep_io_readl (void *opaque, target_phys_addr_t addr)
uint32_t ret;
addr = prep_IO_address(sysctrl, addr);
ret = cpu_inl(NULL, addr);
ret = cpu_inl(addr);
#ifdef TARGET_WORDS_BIGENDIAN
ret = bswap32(ret);
#endif

12
hw/sh_pci.c
View file

@ -119,32 +119,32 @@ static int sh_pci_addr2port(SHPCIC *pcic, target_phys_addr_t addr)
static void sh_pci_outb (void *p, target_phys_addr_t addr, uint32_t val)
{
cpu_outb(NULL, sh_pci_addr2port(p, addr), val);
cpu_outb(sh_pci_addr2port(p, addr), val);
}
static void sh_pci_outw (void *p, target_phys_addr_t addr, uint32_t val)
{
cpu_outw(NULL, sh_pci_addr2port(p, addr), val);
cpu_outw(sh_pci_addr2port(p, addr), val);
}
static void sh_pci_outl (void *p, target_phys_addr_t addr, uint32_t val)
{
cpu_outl(NULL, sh_pci_addr2port(p, addr), val);
cpu_outl(sh_pci_addr2port(p, addr), val);
}
static uint32_t sh_pci_inb (void *p, target_phys_addr_t addr)
{
return cpu_inb(NULL, sh_pci_addr2port(p, addr));
return cpu_inb(sh_pci_addr2port(p, addr));
}
static uint32_t sh_pci_inw (void *p, target_phys_addr_t addr)
{
return cpu_inw(NULL, sh_pci_addr2port(p, addr));
return cpu_inw(sh_pci_addr2port(p, addr));
}
static uint32_t sh_pci_inl (void *p, target_phys_addr_t addr)
{
return cpu_inl(NULL, sh_pci_addr2port(p, addr));
return cpu_inl(sh_pci_addr2port(p, addr));
}
typedef struct {