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target/riscv: use misa_mxl_max to populate isa string rather than TARGET_LONG_BITS

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A cpu may not have the same xlen as the compile time target, and
misa_mxl_max is the source of truth for what the hart supports.

The conversion from misa_mxl_max to xlen already has one user, so
introduce a helper and use that to populate the isa string.

Link: https://lore.kernel.org/qemu-riscv/20240108-efa3f83dcd3997dc0af458d7@orel/
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-ID: <20240124-swear-monthly-56c281f809a6@spud>
[ Changes by AF:
 - Convert to use RISCVCPUClass *mcc
]
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Conor Dooley 2024-01-24 12:55:49 +00:00 • committed by Alistair Francis
parent 79b50e2c80
commit afa42c21b5
3 changed files with 11 additions and 2 deletions
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2
target/riscv/gdbstub.c
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@ -221,7 +221,7 @@ static int riscv_gen_dynamic_csr_xml(CPUState *cs, int base_reg)
CPURISCVState *env = &cpu->env;
GString *s = g_string_new(NULL);
riscv_csr_predicate_fn predicate;
int bitsize = 16 << mcc->misa_mxl_max;
int bitsize = riscv_cpu_max_xlen(mcc);
int i;
#if !defined(CONFIG_USER_ONLY)