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RISC-V: Adding T-Head MemPair extension

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This patch adds support for the T-Head MemPair instructions.
The patch uses the T-Head specific decoder and translation.

Co-developed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Message-Id: <20230131202013.2541053-9-christoph.muellner@vrull.eu>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Christoph Müllner 2023-01-31 21:20:07 +01:00 • committed by Alistair Francis
parent b8a5832b87
commit af99aa72ef
5 changed files with 109 additions and 1 deletions
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13
target/riscv/xthead.decode
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@ -11,16 +11,21 @@
# Fields:
%rd 7:5
%rd1 7:5
%rs 15:5
%rs1 15:5
%rd2 20:5
%rs2 20:5
%sh5 20:5
%sh6 20:6
%sh2 25:2
# Argument sets
&r rd rs1 rs2 !extern
&r2 rd rs1 !extern
&shift shamt rs1 rd !extern
&th_bfext msb lsb rs1 rd
&th_pair rd1 rs rd2 sh2
# Formats
@sfence_vm ....... ..... ..... ... ..... ....... %rs1
@ -30,6 +35,7 @@
@th_bfext msb:6 lsb:6 ..... ... ..... ....... &th_bfext %rs1 %rd
@sh5 ....... ..... ..... ... ..... ....... &shift shamt=%sh5 %rs1 %rd
@sh6 ...... ...... ..... ... ..... ....... &shift shamt=%sh6 %rs1 %rd
@th_pair ..... .. ..... ..... ... ..... ....... &th_pair %rd1 %rs %rd2 %sh2
# XTheadBa
# Instead of defining a new encoding, we simply use the decoder to
@ -96,6 +102,13 @@ th_muls 00100 01 ..... ..... 001 ..... 0001011 @r
th_mulsh 00101 01 ..... ..... 001 ..... 0001011 @r
th_mulsw 00100 11 ..... ..... 001 ..... 0001011 @r
# XTheadMemPair
th_ldd 11111 .. ..... ..... 100 ..... 0001011 @th_pair
th_lwd 11100 .. ..... ..... 100 ..... 0001011 @th_pair
th_lwud 11110 .. ..... ..... 100 ..... 0001011 @th_pair
th_sdd 11111 .. ..... ..... 101 ..... 0001011 @th_pair
th_swd 11100 .. ..... ..... 101 ..... 0001011 @th_pair
# XTheadSync
th_sfence_vmas 0000010 ..... ..... 000 00000 0001011 @rs2_s
th_sync 0000000 11000 00000 000 00000 0001011