mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-05 08:43:55 -06:00
tcg: Add page_bits and page_mask to TCGContext
Disconnect guest page size from TCG compilation. While this could be done via exec/target_page.h, we want to cache the value across multiple memory access operations, so we might as well initialize this early. The changes within tcg/ are entirely mechanical: sed -i s/TARGET_PAGE_BITS/s->page_bits/g sed -i s/TARGET_PAGE_MASK/s->page_mask/g Reviewed-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
parent
c31e5fa44d
commit
aece72b76b
11 changed files with 38 additions and 29 deletions
|
@ -1056,7 +1056,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
|
|||
|
||||
/* Extract the page index, shifted into place for tlb index. */
|
||||
tcg_out_arithi(s, TCG_REG_T1, addr_reg,
|
||||
TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS, SHIFT_SRL);
|
||||
s->page_bits - CPU_TLB_ENTRY_BITS, SHIFT_SRL);
|
||||
tcg_out_arith(s, TCG_REG_T1, TCG_REG_T1, TCG_REG_T2, ARITH_AND);
|
||||
|
||||
/* Add the tlb_table pointer, creating the CPUTLBEntry address into R2. */
|
||||
|
@ -1068,7 +1068,7 @@ static TCGLabelQemuLdst *prepare_host_addr(TCGContext *s, HostAddress *h,
|
|||
h->base = TCG_REG_T1;
|
||||
|
||||
/* Mask out the page offset, except for the required alignment. */
|
||||
compare_mask = TARGET_PAGE_MASK | a_mask;
|
||||
compare_mask = s->page_mask | a_mask;
|
||||
if (check_fit_tl(compare_mask, 13)) {
|
||||
tcg_out_arithi(s, TCG_REG_T3, addr_reg, compare_mask, ARITH_AND);
|
||||
} else {
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue