mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-04 08:13:54 -06:00
vfio/igd: Consolidate OpRegion initialization into a single function
Both x-igd-opregion option and legacy mode require identical steps to set up OpRegion for IGD devices. Consolidate these steps into a single vfio_pci_igd_setup_opregion function. The function call in pci.c is wrapped with ifdef temporarily to prevent build error for non-x86 archs, it will be removed after we decouple it from legacy mode. Additionally, move vfio_pci_igd_opregion_init to igd.c to prevent it from being compiled in non-x86 builds. Signed-off-by: Tomita Moeko <tomitamoeko@gmail.com> Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Tested-by: Alex Williamson <alex.williamson@redhat.com> Reviewed-by: Corvin Köhne <c.koehne@beckhoff.com> Link: https://lore.kernel.org/qemu-devel/20250306180131.32970-4-tomitamoeko@gmail.com [ clg: Fixed spelling in vfio_pci_igd_setup_opregion() ] Signed-off-by: Cédric Le Goater <clg@redhat.com>
This commit is contained in:
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commit
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4 changed files with 88 additions and 89 deletions
101
hw/vfio/igd.c
101
hw/vfio/igd.c
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@ -106,6 +106,7 @@ static int igd_gen(VFIOPCIDevice *vdev)
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return -1;
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return -1;
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}
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}
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#define IGD_ASLS 0xfc /* ASL Storage Register */
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#define IGD_GMCH 0x50 /* Graphics Control Register */
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#define IGD_GMCH 0x50 /* Graphics Control Register */
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#define IGD_BDSM 0x5c /* Base Data of Stolen Memory */
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#define IGD_BDSM 0x5c /* Base Data of Stolen Memory */
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#define IGD_BDSM_GEN11 0xc0 /* Base Data of Stolen Memory of gen 11 and later */
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#define IGD_BDSM_GEN11 0xc0 /* Base Data of Stolen Memory of gen 11 and later */
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@ -138,6 +139,82 @@ static uint64_t igd_stolen_memory_size(int gen, uint32_t gmch)
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return 0;
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return 0;
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}
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}
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/*
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* The OpRegion includes the Video BIOS Table, which seems important for
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* telling the driver what sort of outputs it has. Without this, the device
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* may work in the guest, but we may not get output. This also requires BIOS
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* support to reserve and populate a section of guest memory sufficient for
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* the table and to write the base address of that memory to the ASLS register
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* of the IGD device.
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*/
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static bool vfio_pci_igd_opregion_init(VFIOPCIDevice *vdev,
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struct vfio_region_info *info,
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Error **errp)
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{
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int ret;
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vdev->igd_opregion = g_malloc0(info->size);
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ret = pread(vdev->vbasedev.fd, vdev->igd_opregion,
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info->size, info->offset);
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if (ret != info->size) {
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error_setg(errp, "failed to read IGD OpRegion");
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g_free(vdev->igd_opregion);
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vdev->igd_opregion = NULL;
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return false;
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}
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/*
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* Provide fw_cfg with a copy of the OpRegion which the VM firmware is to
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* allocate 32bit reserved memory for, copy these contents into, and write
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* the reserved memory base address to the device ASLS register at 0xFC.
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* Alignment of this reserved region seems flexible, but using a 4k page
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* alignment seems to work well. This interface assumes a single IGD
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* device, which may be at VM address 00:02.0 in legacy mode or another
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* address in UPT mode.
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*
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* NB, there may be future use cases discovered where the VM should have
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* direct interaction with the host OpRegion, in which case the write to
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* the ASLS register would trigger MemoryRegion setup to enable that.
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*/
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fw_cfg_add_file(fw_cfg_find(), "etc/igd-opregion",
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vdev->igd_opregion, info->size);
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trace_vfio_pci_igd_opregion_enabled(vdev->vbasedev.name);
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pci_set_long(vdev->pdev.config + IGD_ASLS, 0);
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pci_set_long(vdev->pdev.wmask + IGD_ASLS, ~0);
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pci_set_long(vdev->emulated_config_bits + IGD_ASLS, ~0);
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return true;
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}
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bool vfio_pci_igd_setup_opregion(VFIOPCIDevice *vdev, Error **errp)
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{
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g_autofree struct vfio_region_info *opregion = NULL;
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int ret;
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/* Hotplugging is not supported for opregion access */
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if (vdev->pdev.qdev.hotplugged) {
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error_setg(errp, "IGD OpRegion is not supported on hotplugged device");
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return false;
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}
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ret = vfio_get_dev_region_info(&vdev->vbasedev,
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VFIO_REGION_TYPE_PCI_VENDOR_TYPE | PCI_VENDOR_ID_INTEL,
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VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION, &opregion);
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if (ret) {
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error_setg_errno(errp, -ret,
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"Device does not supports IGD OpRegion feature");
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return false;
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}
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if (!vfio_pci_igd_opregion_init(vdev, opregion, errp)) {
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return false;
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}
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return true;
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}
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/*
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/*
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* The rather short list of registers that we copy from the host devices.
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* The rather short list of registers that we copy from the host devices.
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* The LPC/ISA bridge values are definitely needed to support the vBIOS, the
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* The LPC/ISA bridge values are definitely needed to support the vBIOS, the
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@ -342,7 +419,6 @@ void vfio_probe_igd_bar0_quirk(VFIOPCIDevice *vdev, int nr)
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void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, int nr)
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void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, int nr)
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{
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{
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g_autofree struct vfio_region_info *rom = NULL;
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g_autofree struct vfio_region_info *rom = NULL;
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g_autofree struct vfio_region_info *opregion = NULL;
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g_autofree struct vfio_region_info *host = NULL;
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g_autofree struct vfio_region_info *host = NULL;
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g_autofree struct vfio_region_info *lpc = NULL;
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g_autofree struct vfio_region_info *lpc = NULL;
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PCIDevice *lpc_bridge;
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PCIDevice *lpc_bridge;
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@ -418,15 +494,6 @@ void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, int nr)
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* Check whether we have all the vfio device specific regions to
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* Check whether we have all the vfio device specific regions to
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* support legacy mode (added in Linux v4.6). If not, bail.
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* support legacy mode (added in Linux v4.6). If not, bail.
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*/
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*/
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ret = vfio_get_dev_region_info(&vdev->vbasedev,
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VFIO_REGION_TYPE_PCI_VENDOR_TYPE | PCI_VENDOR_ID_INTEL,
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VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION, &opregion);
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if (ret) {
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error_report("IGD device %s does not support OpRegion access,"
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"legacy mode disabled", vdev->vbasedev.name);
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return;
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}
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ret = vfio_get_dev_region_info(&vdev->vbasedev,
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ret = vfio_get_dev_region_info(&vdev->vbasedev,
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VFIO_REGION_TYPE_PCI_VENDOR_TYPE | PCI_VENDOR_ID_INTEL,
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VFIO_REGION_TYPE_PCI_VENDOR_TYPE | PCI_VENDOR_ID_INTEL,
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VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG, &host);
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VFIO_REGION_SUBTYPE_INTEL_IGD_HOST_CFG, &host);
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@ -459,6 +526,13 @@ void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, int nr)
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return;
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return;
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}
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}
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/* Setup OpRegion access */
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if (!vfio_pci_igd_setup_opregion(vdev, &err)) {
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error_append_hint(&err, "IGD legacy mode disabled\n");
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error_report_err(err);
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return;
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}
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/* Create our LPC/ISA bridge */
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/* Create our LPC/ISA bridge */
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ret = vfio_pci_igd_lpc_init(vdev, lpc);
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ret = vfio_pci_igd_lpc_init(vdev, lpc);
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if (ret) {
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if (ret) {
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@ -475,13 +549,6 @@ void vfio_probe_igd_bar4_quirk(VFIOPCIDevice *vdev, int nr)
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return;
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return;
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}
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}
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/* Setup OpRegion access */
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if (!vfio_pci_igd_opregion_init(vdev, opregion, &err)) {
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error_append_hint(&err, "IGD legacy mode disabled\n");
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error_reportf_err(err, VFIO_MSG_PREFIX, vdev->vbasedev.name);
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return;
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}
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/*
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/*
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* Allow user to override dsm size using x-igd-gms option, in multiples of
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* Allow user to override dsm size using x-igd-gms option, in multiples of
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* 32MiB. This option should only be used when the desired size cannot be
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* 32MiB. This option should only be used when the desired size cannot be
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@ -1114,56 +1114,6 @@ static void vfio_probe_rtl8168_bar2_quirk(VFIOPCIDevice *vdev, int nr)
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trace_vfio_quirk_rtl8168_probe(vdev->vbasedev.name);
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trace_vfio_quirk_rtl8168_probe(vdev->vbasedev.name);
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}
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}
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#define IGD_ASLS 0xfc /* ASL Storage Register */
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/*
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* The OpRegion includes the Video BIOS Table, which seems important for
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* telling the driver what sort of outputs it has. Without this, the device
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* may work in the guest, but we may not get output. This also requires BIOS
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* support to reserve and populate a section of guest memory sufficient for
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* the table and to write the base address of that memory to the ASLS register
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* of the IGD device.
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*/
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bool vfio_pci_igd_opregion_init(VFIOPCIDevice *vdev,
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struct vfio_region_info *info, Error **errp)
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{
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int ret;
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vdev->igd_opregion = g_malloc0(info->size);
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ret = pread(vdev->vbasedev.fd, vdev->igd_opregion,
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info->size, info->offset);
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if (ret != info->size) {
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error_setg(errp, "failed to read IGD OpRegion");
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g_free(vdev->igd_opregion);
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vdev->igd_opregion = NULL;
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return false;
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}
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/*
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* Provide fw_cfg with a copy of the OpRegion which the VM firmware is to
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* allocate 32bit reserved memory for, copy these contents into, and write
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* the reserved memory base address to the device ASLS register at 0xFC.
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* Alignment of this reserved region seems flexible, but using a 4k page
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* alignment seems to work well. This interface assumes a single IGD
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* device, which may be at VM address 00:02.0 in legacy mode or another
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* address in UPT mode.
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*
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* NB, there may be future use cases discovered where the VM should have
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* direct interaction with the host OpRegion, in which case the write to
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* the ASLS register would trigger MemoryRegion setup to enable that.
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*/
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fw_cfg_add_file(fw_cfg_find(), "etc/igd-opregion",
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vdev->igd_opregion, info->size);
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trace_vfio_pci_igd_opregion_enabled(vdev->vbasedev.name);
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pci_set_long(vdev->pdev.config + IGD_ASLS, 0);
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pci_set_long(vdev->pdev.wmask + IGD_ASLS, ~0);
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pci_set_long(vdev->emulated_config_bits + IGD_ASLS, ~0);
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return true;
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}
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/*
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/*
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* Common quirk probe entry points.
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* Common quirk probe entry points.
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*/
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*/
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@ -3136,30 +3136,14 @@ static void vfio_realize(PCIDevice *pdev, Error **errp)
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vfio_bar_quirk_setup(vdev, i);
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vfio_bar_quirk_setup(vdev, i);
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}
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}
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#ifdef CONFIG_VFIO_IGD
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if (!vdev->igd_opregion &&
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if (!vdev->igd_opregion &&
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vdev->features & VFIO_FEATURE_ENABLE_IGD_OPREGION) {
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vdev->features & VFIO_FEATURE_ENABLE_IGD_OPREGION) {
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g_autofree struct vfio_region_info *opregion = NULL;
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if (!vfio_pci_igd_setup_opregion(vdev, errp)) {
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if (vdev->pdev.qdev.hotplugged) {
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error_setg(errp,
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"cannot support IGD OpRegion feature on hotplugged "
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"device");
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goto out_unset_idev;
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}
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ret = vfio_get_dev_region_info(vbasedev,
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VFIO_REGION_TYPE_PCI_VENDOR_TYPE | PCI_VENDOR_ID_INTEL,
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VFIO_REGION_SUBTYPE_INTEL_IGD_OPREGION, &opregion);
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if (ret) {
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error_setg_errno(errp, -ret,
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"does not support requested IGD OpRegion feature");
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goto out_unset_idev;
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}
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if (!vfio_pci_igd_opregion_init(vdev, opregion, errp)) {
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goto out_unset_idev;
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goto out_unset_idev;
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}
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}
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}
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}
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#endif
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/* QEMU emulates all of MSI & MSIX */
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/* QEMU emulates all of MSI & MSIX */
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if (pdev->cap_present & QEMU_PCI_CAP_MSIX) {
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if (pdev->cap_present & QEMU_PCI_CAP_MSIX) {
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@ -227,9 +227,7 @@ int vfio_pci_get_pci_hot_reset_info(VFIOPCIDevice *vdev,
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bool vfio_populate_vga(VFIOPCIDevice *vdev, Error **errp);
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bool vfio_populate_vga(VFIOPCIDevice *vdev, Error **errp);
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bool vfio_pci_igd_opregion_init(VFIOPCIDevice *vdev,
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bool vfio_pci_igd_setup_opregion(VFIOPCIDevice *vdev, Error **errp);
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struct vfio_region_info *info,
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Error **errp);
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void vfio_display_reset(VFIOPCIDevice *vdev);
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void vfio_display_reset(VFIOPCIDevice *vdev);
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bool vfio_display_probe(VFIOPCIDevice *vdev, Error **errp);
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bool vfio_display_probe(VFIOPCIDevice *vdev, Error **errp);
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