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hw/intc/arm_gicv3: Implement GICv4's new redistributor frame

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The GICv4 extends the redistributor register map -- where GICv3
had two 64KB frames per CPU, GICv4 has four frames. Add support
for the extra frame by using a new gicv3_redist_size() function
in the places in the GIC implementation which currently use
a fixed constant size for the redistributor register block.
(Until we implement the extra registers they will RAZ/WI.)

Any board that wants to use a GICv4 will need to also adjust
to handle the different sized redistributor register block;
that will be done separately.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220408141550.1271295-23-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2022-04-08 15:15:31 +01:00
parent c6dd2f9950
commit ae3b3ba15c
4 changed files with 31 additions and 5 deletions
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8
hw/intc/arm_gicv3_redist.c
View file

@ -442,8 +442,8 @@ MemTxResult gicv3_redist_read(void *opaque, hwaddr offset, uint64_t *data,
* in the memory map); if so then the GIC has multiple MemoryRegions
* for the redistributors.
*/
cpuidx = region->cpuidx + offset / GICV3_REDIST_SIZE;
offset %= GICV3_REDIST_SIZE;
cpuidx = region->cpuidx + offset / gicv3_redist_size(s);
offset %= gicv3_redist_size(s);
cs = &s->cpu[cpuidx];
@ -501,8 +501,8 @@ MemTxResult gicv3_redist_write(void *opaque, hwaddr offset, uint64_t data,
* in the memory map); if so then the GIC has multiple MemoryRegions
* for the redistributors.
*/
cpuidx = region->cpuidx + offset / GICV3_REDIST_SIZE;
offset %= GICV3_REDIST_SIZE;
cpuidx = region->cpuidx + offset / gicv3_redist_size(s);
offset %= gicv3_redist_size(s);
cs = &s->cpu[cpuidx];