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tcg: Rename cpu_env to tcg_env

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Allow the name 'cpu_env' to be used for something else.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2023-09-13 16:37:36 -07:00
parent a953b5fa15
commit ad75a51e84
91 changed files with 3818 additions and 3819 deletions
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48
target/riscv/insn_trans/trans_rvd.c.inc
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@ -91,7 +91,7 @@ static bool trans_fmadd_d(DisasContext *ctx, arg_fmadd_d *a)
TCGv_i64 src3 = get_fpr_d(ctx, a->rs3);
gen_set_rm(ctx, a->rm);
gen_helper_fmadd_d(dest, cpu_env, src1, src2, src3);
gen_helper_fmadd_d(dest, tcg_env, src1, src2, src3);
gen_set_fpr_d(ctx, a->rd, dest);
mark_fs_dirty(ctx);
return true;
@ -109,7 +109,7 @@ static bool trans_fmsub_d(DisasContext *ctx, arg_fmsub_d *a)
TCGv_i64 src3 = get_fpr_d(ctx, a->rs3);
gen_set_rm(ctx, a->rm);
gen_helper_fmsub_d(dest, cpu_env, src1, src2, src3);
gen_helper_fmsub_d(dest, tcg_env, src1, src2, src3);
gen_set_fpr_d(ctx, a->rd, dest);
mark_fs_dirty(ctx);
return true;
@ -127,7 +127,7 @@ static bool trans_fnmsub_d(DisasContext *ctx, arg_fnmsub_d *a)
TCGv_i64 src3 = get_fpr_d(ctx, a->rs3);
gen_set_rm(ctx, a->rm);
gen_helper_fnmsub_d(dest, cpu_env, src1, src2, src3);
gen_helper_fnmsub_d(dest, tcg_env, src1, src2, src3);
gen_set_fpr_d(ctx, a->rd, dest);
mark_fs_dirty(ctx);
return true;
@ -145,7 +145,7 @@ static bool trans_fnmadd_d(DisasContext *ctx, arg_fnmadd_d *a)
TCGv_i64 src3 = get_fpr_d(ctx, a->rs3);
gen_set_rm(ctx, a->rm);
gen_helper_fnmadd_d(dest, cpu_env, src1, src2, src3);
gen_helper_fnmadd_d(dest, tcg_env, src1, src2, src3);
gen_set_fpr_d(ctx, a->rd, dest);
mark_fs_dirty(ctx);
return true;
@ -162,7 +162,7 @@ static bool trans_fadd_d(DisasContext *ctx, arg_fadd_d *a)
TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
gen_set_rm(ctx, a->rm);
gen_helper_fadd_d(dest, cpu_env, src1, src2);
gen_helper_fadd_d(dest, tcg_env, src1, src2);
gen_set_fpr_d(ctx, a->rd, dest);
mark_fs_dirty(ctx);
return true;
@ -179,7 +179,7 @@ static bool trans_fsub_d(DisasContext *ctx, arg_fsub_d *a)
TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
gen_set_rm(ctx, a->rm);
gen_helper_fsub_d(dest, cpu_env, src1, src2);
gen_helper_fsub_d(dest, tcg_env, src1, src2);
gen_set_fpr_d(ctx, a->rd, dest);
mark_fs_dirty(ctx);
return true;
@ -196,7 +196,7 @@ static bool trans_fmul_d(DisasContext *ctx, arg_fmul_d *a)
TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
gen_set_rm(ctx, a->rm);
gen_helper_fmul_d(dest, cpu_env, src1, src2);
gen_helper_fmul_d(dest, tcg_env, src1, src2);
gen_set_fpr_d(ctx, a->rd, dest);
mark_fs_dirty(ctx);
return true;
@ -213,7 +213,7 @@ static bool trans_fdiv_d(DisasContext *ctx, arg_fdiv_d *a)
TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
gen_set_rm(ctx, a->rm);
gen_helper_fdiv_d(dest, cpu_env, src1, src2);
gen_helper_fdiv_d(dest, tcg_env, src1, src2);
gen_set_fpr_d(ctx, a->rd, dest);
mark_fs_dirty(ctx);
return true;
@ -229,7 +229,7 @@ static bool trans_fsqrt_d(DisasContext *ctx, arg_fsqrt_d *a)
TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
gen_set_rm(ctx, a->rm);
gen_helper_fsqrt_d(dest, cpu_env, src1);
gen_helper_fsqrt_d(dest, tcg_env, src1);
gen_set_fpr_d(ctx, a->rd, dest);
mark_fs_dirty(ctx);
return true;
@ -308,7 +308,7 @@ static bool trans_fmin_d(DisasContext *ctx, arg_fmin_d *a)
TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
gen_helper_fmin_d(dest, cpu_env, src1, src2);
gen_helper_fmin_d(dest, tcg_env, src1, src2);
gen_set_fpr_d(ctx, a->rd, dest);
mark_fs_dirty(ctx);
return true;
@ -324,7 +324,7 @@ static bool trans_fmax_d(DisasContext *ctx, arg_fmax_d *a)
TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
gen_helper_fmax_d(dest, cpu_env, src1, src2);
gen_helper_fmax_d(dest, tcg_env, src1, src2);
gen_set_fpr_d(ctx, a->rd, dest);
mark_fs_dirty(ctx);
return true;
@ -340,7 +340,7 @@ static bool trans_fcvt_s_d(DisasContext *ctx, arg_fcvt_s_d *a)
TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
gen_set_rm(ctx, a->rm);
gen_helper_fcvt_s_d(dest, cpu_env, src1);
gen_helper_fcvt_s_d(dest, tcg_env, src1);
gen_set_fpr_hs(ctx, a->rd, dest);
mark_fs_dirty(ctx);
return true;
@ -356,7 +356,7 @@ static bool trans_fcvt_d_s(DisasContext *ctx, arg_fcvt_d_s *a)
TCGv_i64 src1 = get_fpr_hs(ctx, a->rs1);
gen_set_rm(ctx, a->rm);
gen_helper_fcvt_d_s(dest, cpu_env, src1);
gen_helper_fcvt_d_s(dest, tcg_env, src1);
gen_set_fpr_d(ctx, a->rd, dest);
mark_fs_dirty(ctx);
return true;
@ -372,7 +372,7 @@ static bool trans_feq_d(DisasContext *ctx, arg_feq_d *a)
TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
gen_helper_feq_d(dest, cpu_env, src1, src2);
gen_helper_feq_d(dest, tcg_env, src1, src2);
gen_set_gpr(ctx, a->rd, dest);
return true;
}
@ -387,7 +387,7 @@ static bool trans_flt_d(DisasContext *ctx, arg_flt_d *a)
TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
gen_helper_flt_d(dest, cpu_env, src1, src2);
gen_helper_flt_d(dest, tcg_env, src1, src2);
gen_set_gpr(ctx, a->rd, dest);
return true;
}
@ -402,7 +402,7 @@ static bool trans_fle_d(DisasContext *ctx, arg_fle_d *a)
TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
TCGv_i64 src2 = get_fpr_d(ctx, a->rs2);
gen_helper_fle_d(dest, cpu_env, src1, src2);
gen_helper_fle_d(dest, tcg_env, src1, src2);
gen_set_gpr(ctx, a->rd, dest);
return true;
}
@ -431,7 +431,7 @@ static bool trans_fcvt_w_d(DisasContext *ctx, arg_fcvt_w_d *a)
TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
gen_set_rm(ctx, a->rm);
gen_helper_fcvt_w_d(dest, cpu_env, src1);
gen_helper_fcvt_w_d(dest, tcg_env, src1);
gen_set_gpr(ctx, a->rd, dest);
return true;
}
@ -446,7 +446,7 @@ static bool trans_fcvt_wu_d(DisasContext *ctx, arg_fcvt_wu_d *a)
TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
gen_set_rm(ctx, a->rm);
gen_helper_fcvt_wu_d(dest, cpu_env, src1);
gen_helper_fcvt_wu_d(dest, tcg_env, src1);
gen_set_gpr(ctx, a->rd, dest);
return true;
}
@ -461,7 +461,7 @@ static bool trans_fcvt_d_w(DisasContext *ctx, arg_fcvt_d_w *a)
TCGv src = get_gpr(ctx, a->rs1, EXT_SIGN);
gen_set_rm(ctx, a->rm);
gen_helper_fcvt_d_w(dest, cpu_env, src);
gen_helper_fcvt_d_w(dest, tcg_env, src);
gen_set_fpr_d(ctx, a->rd, dest);
mark_fs_dirty(ctx);
@ -478,7 +478,7 @@ static bool trans_fcvt_d_wu(DisasContext *ctx, arg_fcvt_d_wu *a)
TCGv src = get_gpr(ctx, a->rs1, EXT_ZERO);
gen_set_rm(ctx, a->rm);
gen_helper_fcvt_d_wu(dest, cpu_env, src);
gen_helper_fcvt_d_wu(dest, tcg_env, src);
gen_set_fpr_d(ctx, a->rd, dest);
mark_fs_dirty(ctx);
@ -496,7 +496,7 @@ static bool trans_fcvt_l_d(DisasContext *ctx, arg_fcvt_l_d *a)
TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
gen_set_rm(ctx, a->rm);
gen_helper_fcvt_l_d(dest, cpu_env, src1);
gen_helper_fcvt_l_d(dest, tcg_env, src1);
gen_set_gpr(ctx, a->rd, dest);
return true;
}
@ -512,7 +512,7 @@ static bool trans_fcvt_lu_d(DisasContext *ctx, arg_fcvt_lu_d *a)
TCGv_i64 src1 = get_fpr_d(ctx, a->rs1);
gen_set_rm(ctx, a->rm);
gen_helper_fcvt_lu_d(dest, cpu_env, src1);
gen_helper_fcvt_lu_d(dest, tcg_env, src1);
gen_set_gpr(ctx, a->rd, dest);
return true;
}
@ -542,7 +542,7 @@ static bool trans_fcvt_d_l(DisasContext *ctx, arg_fcvt_d_l *a)
TCGv src = get_gpr(ctx, a->rs1, EXT_SIGN);
gen_set_rm(ctx, a->rm);
gen_helper_fcvt_d_l(dest, cpu_env, src);
gen_helper_fcvt_d_l(dest, tcg_env, src);
gen_set_fpr_d(ctx, a->rd, dest);
mark_fs_dirty(ctx);
@ -560,7 +560,7 @@ static bool trans_fcvt_d_lu(DisasContext *ctx, arg_fcvt_d_lu *a)
TCGv src = get_gpr(ctx, a->rs1, EXT_ZERO);
gen_set_rm(ctx, a->rm);
gen_helper_fcvt_d_lu(dest, cpu_env, src);
gen_helper_fcvt_d_lu(dest, tcg_env, src);
gen_set_fpr_d(ctx, a->rd, dest);
mark_fs_dirty(ctx);