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synced 2025-08-09 02:24:58 -06:00
tcg: Rename cpu_env to tcg_env
Allow the name 'cpu_env' to be used for something else. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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parent
a953b5fa15
commit
ad75a51e84
91 changed files with 3818 additions and 3819 deletions
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@ -115,7 +115,7 @@ intptr_t ctx_tmp_vreg_off(DisasContext *ctx, int regnum,
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static void gen_exception_raw(int excp)
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{
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gen_helper_raise_exception(cpu_env, tcg_constant_i32(excp));
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gen_helper_raise_exception(tcg_env, tcg_constant_i32(excp));
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}
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static void gen_exec_counters(DisasContext *ctx)
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@ -528,7 +528,7 @@ static void gen_start_packet(DisasContext *ctx)
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if (HEX_DEBUG) {
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/* Handy place to set a breakpoint before the packet executes */
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gen_helper_debug_start_packet(cpu_env);
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gen_helper_debug_start_packet(tcg_env);
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}
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/* Initialize the runtime state for packet semantics */
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@ -701,7 +701,7 @@ static void gen_check_store_width(DisasContext *ctx, int slot_num)
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if (HEX_DEBUG) {
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TCGv slot = tcg_constant_tl(slot_num);
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TCGv check = tcg_constant_tl(ctx->store_width[slot_num]);
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gen_helper_debug_check_store_width(cpu_env, slot, check);
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gen_helper_debug_check_store_width(tcg_env, slot, check);
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}
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}
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@ -783,7 +783,7 @@ void process_store(DisasContext *ctx, int slot_num)
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* avoid branching based on the width at runtime.
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*/
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TCGv slot = tcg_constant_tl(slot_num);
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gen_helper_commit_store(cpu_env, slot);
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gen_helper_commit_store(tcg_env, slot);
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}
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}
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}
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@ -882,7 +882,7 @@ static void gen_commit_hvx(DisasContext *ctx)
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}
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if (pkt_has_hvx_store(ctx->pkt)) {
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gen_helper_commit_hvx_stores(cpu_env);
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gen_helper_commit_hvx_stores(tcg_env);
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}
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}
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@ -942,7 +942,7 @@ static void gen_commit_packet(DisasContext *ctx)
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} else if (has_hvx_store) {
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if (!has_store_s0 && !has_store_s1) {
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TCGv mem_idx = tcg_constant_tl(ctx->mem_idx);
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gen_helper_probe_hvx_stores(cpu_env, mem_idx);
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gen_helper_probe_hvx_stores(tcg_env, mem_idx);
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} else {
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int mask = 0;
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@ -971,7 +971,7 @@ static void gen_commit_packet(DisasContext *ctx)
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}
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mask = FIELD_DP32(mask, PROBE_PKT_SCALAR_HVX_STORES, MMU_IDX,
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ctx->mem_idx);
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gen_helper_probe_pkt_scalar_hvx_stores(cpu_env,
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gen_helper_probe_pkt_scalar_hvx_stores(tcg_env,
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tcg_constant_tl(mask));
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}
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} else if (has_store_s0 && has_store_s1) {
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@ -987,7 +987,7 @@ static void gen_commit_packet(DisasContext *ctx)
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FIELD_DP32(args, PROBE_PKT_SCALAR_STORE_S0, IS_PREDICATED, 1);
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}
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TCGv args_tcgv = tcg_constant_tl(args);
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gen_helper_probe_pkt_scalar_store_s0(cpu_env, args_tcgv);
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gen_helper_probe_pkt_scalar_store_s0(tcg_env, args_tcgv);
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}
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process_store_log(ctx);
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@ -1005,7 +1005,7 @@ static void gen_commit_packet(DisasContext *ctx)
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tcg_constant_tl(pkt->pkt_has_store_s1 && !pkt->pkt_has_dczeroa);
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/* Handy place to set a breakpoint at the end of execution */
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gen_helper_debug_commit_end(cpu_env, tcg_constant_tl(ctx->pkt->pc),
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gen_helper_debug_commit_end(tcg_env, tcg_constant_tl(ctx->pkt->pc),
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ctx->pred_written, has_st0, has_st1);
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}
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@ -1179,68 +1179,68 @@ void hexagon_translate_init(void)
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opcode_init();
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for (i = 0; i < TOTAL_PER_THREAD_REGS; i++) {
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hex_gpr[i] = tcg_global_mem_new(cpu_env,
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hex_gpr[i] = tcg_global_mem_new(tcg_env,
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offsetof(CPUHexagonState, gpr[i]),
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hexagon_regnames[i]);
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if (HEX_DEBUG) {
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snprintf(reg_written_names[i], NAME_LEN, "reg_written_%s",
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hexagon_regnames[i]);
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hex_reg_written[i] = tcg_global_mem_new(cpu_env,
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hex_reg_written[i] = tcg_global_mem_new(tcg_env,
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offsetof(CPUHexagonState, reg_written[i]),
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reg_written_names[i]);
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}
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}
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hex_new_value_usr = tcg_global_mem_new(cpu_env,
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hex_new_value_usr = tcg_global_mem_new(tcg_env,
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offsetof(CPUHexagonState, new_value_usr), "new_value_usr");
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for (i = 0; i < NUM_PREGS; i++) {
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hex_pred[i] = tcg_global_mem_new(cpu_env,
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hex_pred[i] = tcg_global_mem_new(tcg_env,
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offsetof(CPUHexagonState, pred[i]),
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hexagon_prednames[i]);
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}
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hex_slot_cancelled = tcg_global_mem_new(cpu_env,
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hex_slot_cancelled = tcg_global_mem_new(tcg_env,
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offsetof(CPUHexagonState, slot_cancelled), "slot_cancelled");
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hex_llsc_addr = tcg_global_mem_new(cpu_env,
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hex_llsc_addr = tcg_global_mem_new(tcg_env,
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offsetof(CPUHexagonState, llsc_addr), "llsc_addr");
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hex_llsc_val = tcg_global_mem_new(cpu_env,
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hex_llsc_val = tcg_global_mem_new(tcg_env,
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offsetof(CPUHexagonState, llsc_val), "llsc_val");
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hex_llsc_val_i64 = tcg_global_mem_new_i64(cpu_env,
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hex_llsc_val_i64 = tcg_global_mem_new_i64(tcg_env,
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offsetof(CPUHexagonState, llsc_val_i64), "llsc_val_i64");
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for (i = 0; i < STORES_MAX; i++) {
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snprintf(store_addr_names[i], NAME_LEN, "store_addr_%d", i);
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hex_store_addr[i] = tcg_global_mem_new(cpu_env,
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hex_store_addr[i] = tcg_global_mem_new(tcg_env,
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offsetof(CPUHexagonState, mem_log_stores[i].va),
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store_addr_names[i]);
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snprintf(store_width_names[i], NAME_LEN, "store_width_%d", i);
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hex_store_width[i] = tcg_global_mem_new(cpu_env,
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hex_store_width[i] = tcg_global_mem_new(tcg_env,
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offsetof(CPUHexagonState, mem_log_stores[i].width),
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store_width_names[i]);
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snprintf(store_val32_names[i], NAME_LEN, "store_val32_%d", i);
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hex_store_val32[i] = tcg_global_mem_new(cpu_env,
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hex_store_val32[i] = tcg_global_mem_new(tcg_env,
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offsetof(CPUHexagonState, mem_log_stores[i].data32),
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store_val32_names[i]);
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snprintf(store_val64_names[i], NAME_LEN, "store_val64_%d", i);
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hex_store_val64[i] = tcg_global_mem_new_i64(cpu_env,
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hex_store_val64[i] = tcg_global_mem_new_i64(tcg_env,
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offsetof(CPUHexagonState, mem_log_stores[i].data64),
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store_val64_names[i]);
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}
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for (int i = 0; i < VSTORES_MAX; i++) {
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snprintf(vstore_addr_names[i], NAME_LEN, "vstore_addr_%d", i);
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hex_vstore_addr[i] = tcg_global_mem_new(cpu_env,
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hex_vstore_addr[i] = tcg_global_mem_new(tcg_env,
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offsetof(CPUHexagonState, vstore[i].va),
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vstore_addr_names[i]);
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snprintf(vstore_size_names[i], NAME_LEN, "vstore_size_%d", i);
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hex_vstore_size[i] = tcg_global_mem_new(cpu_env,
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hex_vstore_size[i] = tcg_global_mem_new(tcg_env,
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offsetof(CPUHexagonState, vstore[i].size),
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vstore_size_names[i]);
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snprintf(vstore_pending_names[i], NAME_LEN, "vstore_pending_%d", i);
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hex_vstore_pending[i] = tcg_global_mem_new(cpu_env,
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hex_vstore_pending[i] = tcg_global_mem_new(tcg_env,
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offsetof(CPUHexagonState, vstore_pending[i]),
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vstore_pending_names[i]);
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}
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