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target/i386: implement TSS trap bit

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Now that we can do so after the error code has been pushed, raising
the #DB exception for task-switch traps is trivial.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2024-08-14 12:33:02 +02:00
parent c7c332831f
commit ad441b8b79
1 changed files with 5 additions and 4 deletions
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9
target/i386/tcg/seg_helper.c
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@ -473,10 +473,6 @@ static void switch_tss_ra(CPUX86State *env, int tss_selector,
new_segs[R_GS] = 0;
new_trap = 0;
}
/* XXX: avoid a compiler warning, see
http://support.amd.com/us/Processor_TechDocs/24593.pdf
chapters 12.2.5 and 13.2.4 on how to implement TSS Trap bit */
(void)new_trap;
/* clear busy bit (it is restartable) */
if (source == SWITCH_TSS_JMP || source == SWITCH_TSS_IRET) {
@ -622,6 +618,11 @@ static void switch_tss_ra(CPUX86State *env, int tss_selector,
}
SET_ESP(sa.sp, sa.sp_mask);
}
if (new_trap) {
env->dr[6] |= DR6_BT;
raise_exception_ra(env, EXCP01_DB, retaddr);
}
}
static void switch_tss(CPUX86State *env, int tss_selector,