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meson: target

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Similar to hw_arch, each architecture defines two sourceset which are placed in
dictionaries target_arch and target_softmmu_arch.  These are then picked up
from there when building the per-emulator static_library.

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
Paolo Bonzini 2020-08-07 12:10:23 +02:00
parent 2c44220d05
commit abff1abfe8
62 changed files with 595 additions and 328 deletions
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34
target/riscv/meson.build Normal file
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# FIXME extra_args should accept files()
dir = meson.current_source_dir()
gen32 = [
decodetree.process('insn16.decode', extra_args: [dir / 'insn16-32.decode', '--static-decode=decode_insn16', '--insnwidth=16']),
decodetree.process('insn32.decode', extra_args: '--static-decode=decode_insn32'),
]
gen64 = [
decodetree.process('insn16.decode', extra_args: [dir / 'insn16-64.decode', '--static-decode=decode_insn16', '--insnwidth=16']),
decodetree.process('insn32.decode', extra_args: [dir / 'insn32-64.decode', '--static-decode=decode_insn32']),
]
riscv_ss = ss.source_set()
riscv_ss.add(when: 'TARGET_RISCV32', if_true: gen32)
riscv_ss.add(when: 'TARGET_RISCV64', if_true: gen64)
riscv_ss.add(files(
'cpu.c',
'cpu_helper.c',
'csr.c',
'fpu_helper.c',
'gdbstub.c',
'op_helper.c',
'vector_helper.c',
'translate.c',
))
riscv_softmmu_ss = ss.source_set()
riscv_softmmu_ss.add(files(
'pmp.c',
'monitor.c'
))
target_arch += {'riscv': riscv_ss}
target_softmmu_arch += {'riscv': riscv_softmmu_ss}