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target/mips: Add CP0 Config3 and Config5 fields to DisasContext structure

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Add CP0_Config3 and CP0_Config5 to DisasContext structure. This is
needed for implementing availability control of various instructions.

Reviewed-by: "Aleksandar Markovic <amarkovic@wavecomp.com>"
Signed-off-by: "Aleksandar Markovic <amarkovic@wavecomp.com>"
This commit is contained in:
Dimitrije Nikolic 2018-08-20 12:14:23 +02:00 • committed by Aleksandar Markovic
parent 8f1d9b6d63
commit ab77fc611b
1 changed files with 4 additions and 0 deletions
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4
target/mips/translate.c
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@ -1449,6 +1449,8 @@ typedef struct DisasContext {
uint32_t opcode; uint32_t opcode;
int insn_flags; int insn_flags;
int32_t CP0_Config1; int32_t CP0_Config1;
int32_t CP0_Config3;
int32_t CP0_Config5;
/* Routine used to access memory */ /* Routine used to access memory */
int mem_idx; int mem_idx;
TCGMemOp default_tcg_memop_mask; TCGMemOp default_tcg_memop_mask;
@ -23307,6 +23309,8 @@ static void mips_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs)
ctx->saved_pc = -1; ctx->saved_pc = -1;
ctx->insn_flags = env->insn_flags; ctx->insn_flags = env->insn_flags;
ctx->CP0_Config1 = env->CP0_Config1; ctx->CP0_Config1 = env->CP0_Config1;
ctx->CP0_Config3 = env->CP0_Config3;
ctx->CP0_Config5 = env->CP0_Config5;
ctx->btarget = 0; ctx->btarget = 0;
ctx->kscrexist = (env->CP0_Config4 >> CP0C4_KScrExist) & 0xff; ctx->kscrexist = (env->CP0_Config4 >> CP0C4_KScrExist) & 0xff;
ctx->rxi = (env->CP0_Config3 >> CP0C3_RXI) & 1; ctx->rxi = (env->CP0_Config3 >> CP0C3_RXI) & 1;