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x86/cpu/numa queue, 2017-10-27

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Merge remote-tracking branch 'remotes/ehabkost/tags/x86-and-machine-pull-request' into staging

x86/cpu/numa queue, 2017-10-27

# gpg: Signature made Fri 27 Oct 2017 15:17:12 BST
# gpg:                using RSA key 0x2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>"
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/x86-and-machine-pull-request: (39 commits)
  x86: Skip check apic_id_limit for Xen
  numa: fixup parsed NumaNodeOptions earlier
  mips: r4k: replace cpu_model with cpu_type
  mips: mipssim: replace cpu_model with cpu_type
  mips: Magnum/Acer Pica 61: replace cpu_model with cpu_type
  mips: fulong2e: replace cpu_model with cpu_type
  mips: malta/boston: replace cpu_model with cpu_type
  mips: use object_new() instead of gnew()+object_initialize()
  sparc: leon3: use generic cpu_model parsing
  sparc: sparc: use generic cpu_model parsing
  sparc: sun4u/sun4v/niagara: use generic cpu_model parsing
  sparc: cleanup cpu type name composition
  tricore: use generic cpu_model parsing
  tricore: cleanup cpu type name composition
  unicore32: use generic cpu_model parsing
  unicore32: cleanup cpu type name composition
  xtensa: lx60/lx200/ml605/kc705: use generic cpu_model parsing
  xtensa: sim: use generic cpu_model parsing
  xtensa: cleanup cpu type name composition
  sh4: remove SuperHCPUClass::name field
  ...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2017-10-30 10:11:22 +00:00
commit ab752f237d
59 changed files with 400 additions and 692 deletions
Download patch file Download diff file Expand all files Collapse all files

74
target/lm32/cpu.c
View file

@ -51,7 +51,7 @@ static void lm32_cpu_list_entry(gpointer data, gpointer user_data)
const char *typename = object_class_get_name(oc);
char *name;
name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_LM32_CPU));
name = g_strndup(typename, strlen(typename) - strlen(LM32_CPU_TYPE_SUFFIX));
(*s->cpu_fprintf)(s->file, " %s\n", name);
g_free(name);
}
@ -215,32 +215,12 @@ static void lm32_full_cpu_initfn(Object *obj)
| LM32_FEATURE_CYCLE_COUNT;
}
typedef struct LM32CPUInfo {
const char *name;
void (*initfn)(Object *obj);
} LM32CPUInfo;
static const LM32CPUInfo lm32_cpus[] = {
{
.name = "lm32-basic",
.initfn = lm32_basic_cpu_initfn,
},
{
.name = "lm32-standard",
.initfn = lm32_standard_cpu_initfn,
},
{
.name = "lm32-full",
.initfn = lm32_full_cpu_initfn,
},
};
static ObjectClass *lm32_cpu_class_by_name(const char *cpu_model)
{
ObjectClass *oc;
char *typename;
typename = g_strdup_printf("%s-" TYPE_LM32_CPU, cpu_model);
typename = g_strdup_printf(LM32_CPU_TYPE_NAME("%s"), cpu_model);
oc = object_class_by_name(typename);
g_free(typename);
if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_LM32_CPU) ||
@ -283,36 +263,26 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data)
cc->tcg_initialize = lm32_translate_init;
}
static void lm32_register_cpu_type(const LM32CPUInfo *info)
{
TypeInfo type_info = {
.parent = TYPE_LM32_CPU,
.instance_init = info->initfn,
};
#define DEFINE_LM32_CPU_TYPE(cpu_model, initfn) \
{ \
.parent = TYPE_LM32_CPU, \
.name = LM32_CPU_TYPE_NAME(cpu_model), \
.instance_init = initfn, \
}
type_info.name = g_strdup_printf("%s-" TYPE_LM32_CPU, info->name);
type_register(&type_info);
g_free((void *)type_info.name);
}
static const TypeInfo lm32_cpu_type_info = {
.name = TYPE_LM32_CPU,
.parent = TYPE_CPU,
.instance_size = sizeof(LM32CPU),
.instance_init = lm32_cpu_initfn,
.abstract = true,
.class_size = sizeof(LM32CPUClass),
.class_init = lm32_cpu_class_init,
static const TypeInfo lm32_cpus_type_infos[] = {
{ /* base class should be registered first */
.name = TYPE_LM32_CPU,
.parent = TYPE_CPU,
.instance_size = sizeof(LM32CPU),
.instance_init = lm32_cpu_initfn,
.abstract = true,
.class_size = sizeof(LM32CPUClass),
.class_init = lm32_cpu_class_init,
},
DEFINE_LM32_CPU_TYPE("lm32-basic", lm32_basic_cpu_initfn),
DEFINE_LM32_CPU_TYPE("lm32-standard", lm32_standard_cpu_initfn),
DEFINE_LM32_CPU_TYPE("lm32-full", lm32_full_cpu_initfn),
};
static void lm32_cpu_register_types(void)
{
int i;
type_register_static(&lm32_cpu_type_info);
for (i = 0; i < ARRAY_SIZE(lm32_cpus); i++) {
lm32_register_cpu_type(&lm32_cpus[i]);
}
}
type_init(lm32_cpu_register_types)
DEFINE_TYPES(lm32_cpus_type_infos)

3
target/lm32/cpu.h
View file

@ -257,6 +257,9 @@ bool lm32_cpu_do_semihosting(CPUState *cs);
#define cpu_init(cpu_model) cpu_generic_init(TYPE_LM32_CPU, cpu_model)
#define LM32_CPU_TYPE_SUFFIX "-" TYPE_LM32_CPU
#define LM32_CPU_TYPE_NAME(model) model LM32_CPU_TYPE_SUFFIX
#define cpu_list lm32_cpu_list
#define cpu_signal_handler cpu_lm32_signal_handler