Savevm/loadvm bits for ARM core, the PXA2xx peripherals and Spitz hardware.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2857 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
balrog 2007-05-24 18:50:09 +00:00
parent 3f6c925f37
commit aa941b9445
18 changed files with 1330 additions and 63 deletions

View file

@ -430,6 +430,61 @@ static CPUWriteMemoryFunc *pxa2xx_dma_writefn[] = {
pxa2xx_dma_write
};
static void pxa2xx_dma_save(QEMUFile *f, void *opaque)
{
struct pxa2xx_dma_state_s *s = (struct pxa2xx_dma_state_s *) opaque;
int i;
qemu_put_be32(f, s->channels);
qemu_put_be32s(f, &s->stopintr);
qemu_put_be32s(f, &s->eorintr);
qemu_put_be32s(f, &s->rasintr);
qemu_put_be32s(f, &s->startintr);
qemu_put_be32s(f, &s->endintr);
qemu_put_be32s(f, &s->align);
qemu_put_be32s(f, &s->pio);
qemu_put_buffer(f, s->req, PXA2XX_DMA_NUM_REQUESTS);
for (i = 0; i < s->channels; i ++) {
qemu_put_betl(f, s->chan[i].descr);
qemu_put_betl(f, s->chan[i].src);
qemu_put_betl(f, s->chan[i].dest);
qemu_put_be32s(f, &s->chan[i].cmd);
qemu_put_be32s(f, &s->chan[i].state);
qemu_put_be32(f, s->chan[i].request);
};
}
static int pxa2xx_dma_load(QEMUFile *f, void *opaque, int version_id)
{
struct pxa2xx_dma_state_s *s = (struct pxa2xx_dma_state_s *) opaque;
int i;
if (qemu_get_be32(f) != s->channels)
return -EINVAL;
qemu_get_be32s(f, &s->stopintr);
qemu_get_be32s(f, &s->eorintr);
qemu_get_be32s(f, &s->rasintr);
qemu_get_be32s(f, &s->startintr);
qemu_get_be32s(f, &s->endintr);
qemu_get_be32s(f, &s->align);
qemu_get_be32s(f, &s->pio);
qemu_get_buffer(f, s->req, PXA2XX_DMA_NUM_REQUESTS);
for (i = 0; i < s->channels; i ++) {
s->chan[i].descr = qemu_get_betl(f);
s->chan[i].src = qemu_get_betl(f);
s->chan[i].dest = qemu_get_betl(f);
qemu_get_be32s(f, &s->chan[i].cmd);
qemu_get_be32s(f, &s->chan[i].state);
s->chan[i].request = qemu_get_be32(f);
};
return 0;
}
static struct pxa2xx_dma_state_s *pxa2xx_dma_init(target_phys_addr_t base,
qemu_irq irq, int channels)
{
@ -455,6 +510,8 @@ static struct pxa2xx_dma_state_s *pxa2xx_dma_init(target_phys_addr_t base,
pxa2xx_dma_writefn, s);
cpu_register_physical_memory(base, 0x0000ffff, iomemtype);
register_savevm("pxa2xx_dma", 0, 0, pxa2xx_dma_save, pxa2xx_dma_load, s);
return s;
}