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Savevm/loadvm bits for ARM core, the PXA2xx peripherals and Spitz hardware.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2857 c046a42c-6fe2-441c-8c8c-71466251a162
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parent
3f6c925f37
commit
aa941b9445
18 changed files with 1330 additions and 63 deletions
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@ -430,6 +430,61 @@ static CPUWriteMemoryFunc *pxa2xx_dma_writefn[] = {
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pxa2xx_dma_write
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};
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static void pxa2xx_dma_save(QEMUFile *f, void *opaque)
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{
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struct pxa2xx_dma_state_s *s = (struct pxa2xx_dma_state_s *) opaque;
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int i;
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qemu_put_be32(f, s->channels);
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qemu_put_be32s(f, &s->stopintr);
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qemu_put_be32s(f, &s->eorintr);
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qemu_put_be32s(f, &s->rasintr);
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qemu_put_be32s(f, &s->startintr);
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qemu_put_be32s(f, &s->endintr);
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qemu_put_be32s(f, &s->align);
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qemu_put_be32s(f, &s->pio);
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qemu_put_buffer(f, s->req, PXA2XX_DMA_NUM_REQUESTS);
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for (i = 0; i < s->channels; i ++) {
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qemu_put_betl(f, s->chan[i].descr);
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qemu_put_betl(f, s->chan[i].src);
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qemu_put_betl(f, s->chan[i].dest);
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qemu_put_be32s(f, &s->chan[i].cmd);
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qemu_put_be32s(f, &s->chan[i].state);
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qemu_put_be32(f, s->chan[i].request);
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};
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}
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static int pxa2xx_dma_load(QEMUFile *f, void *opaque, int version_id)
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{
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struct pxa2xx_dma_state_s *s = (struct pxa2xx_dma_state_s *) opaque;
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int i;
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if (qemu_get_be32(f) != s->channels)
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return -EINVAL;
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qemu_get_be32s(f, &s->stopintr);
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qemu_get_be32s(f, &s->eorintr);
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qemu_get_be32s(f, &s->rasintr);
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qemu_get_be32s(f, &s->startintr);
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qemu_get_be32s(f, &s->endintr);
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qemu_get_be32s(f, &s->align);
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qemu_get_be32s(f, &s->pio);
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qemu_get_buffer(f, s->req, PXA2XX_DMA_NUM_REQUESTS);
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for (i = 0; i < s->channels; i ++) {
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s->chan[i].descr = qemu_get_betl(f);
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s->chan[i].src = qemu_get_betl(f);
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s->chan[i].dest = qemu_get_betl(f);
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qemu_get_be32s(f, &s->chan[i].cmd);
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qemu_get_be32s(f, &s->chan[i].state);
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s->chan[i].request = qemu_get_be32(f);
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};
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return 0;
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}
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static struct pxa2xx_dma_state_s *pxa2xx_dma_init(target_phys_addr_t base,
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qemu_irq irq, int channels)
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{
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@ -455,6 +510,8 @@ static struct pxa2xx_dma_state_s *pxa2xx_dma_init(target_phys_addr_t base,
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pxa2xx_dma_writefn, s);
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cpu_register_physical_memory(base, 0x0000ffff, iomemtype);
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register_savevm("pxa2xx_dma", 0, 0, pxa2xx_dma_save, pxa2xx_dma_load, s);
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return s;
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}
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