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target/i386: Add support for CMPCCXADD in CPUID enumeration
CMPccXADD is a new set of instructions in the latest Intel platform Sierra Forest. This new instruction set includes a semaphore operation that can compare and add the operands if condition is met, which can improve database performance. The bit definition: CPUID.(EAX=7,ECX=1):EAX[bit 7] Add CPUID definition for CMPCCXADD. Signed-off-by: Jiaxi Chen <jiaxi.chen@linux.intel.com> Signed-off-by: Tao Su <tao1.su@linux.intel.com> Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> Message-Id: <20230303065913.1246327-2-tao1.su@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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2 changed files with 3 additions and 1 deletions
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@ -875,7 +875,7 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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.type = CPUID_FEATURE_WORD,
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.type = CPUID_FEATURE_WORD,
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.feat_names = {
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.feat_names = {
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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"avx-vnni", "avx512-bf16", NULL, NULL,
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"avx-vnni", "avx512-bf16", NULL, "cmpccxadd",
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NULL, NULL, "fzrm", "fsrs",
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NULL, NULL, "fzrm", "fsrs",
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"fsrc", NULL, NULL, NULL,
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"fsrc", NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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@ -907,6 +907,8 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w,
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#define CPUID_7_1_EAX_AVX_VNNI (1U << 4)
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#define CPUID_7_1_EAX_AVX_VNNI (1U << 4)
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/* AVX512 BFloat16 Instruction */
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/* AVX512 BFloat16 Instruction */
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#define CPUID_7_1_EAX_AVX512_BF16 (1U << 5)
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#define CPUID_7_1_EAX_AVX512_BF16 (1U << 5)
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/* CMPCCXADD Instructions */
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#define CPUID_7_1_EAX_CMPCCXADD (1U << 7)
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/* Fast Zero REP MOVS */
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/* Fast Zero REP MOVS */
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#define CPUID_7_1_EAX_FZRM (1U << 10)
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#define CPUID_7_1_EAX_FZRM (1U << 10)
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/* Fast Short REP STOS */
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/* Fast Short REP STOS */
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