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hw/misc: Add Microchip PolarFire SoC IOSCB module support

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This creates a model for PolarFire SoC IOSCB [1] module. It actually
contains lots of sub-modules like various PLLs to control different
peripherals. Only the mininum capabilities are emulated to make the
HSS DDR memory initialization codes happy. Lots of sub-modules are
created as an unimplemented devices.

[1] PF_SoC_RegMap_V1_1/MPFS250T/mpfs250t_ioscb_memmap_dri.htm in
    https://www.microsemi.com/document-portal/doc_download/1244581-polarfire-soc-register-map

Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 1603863010-15807-5-git-send-email-bmeng.cn@gmail.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This commit is contained in:
Bin Meng 2020-10-28 13:30:04 +08:00 • committed by Alistair Francis
parent 933f73f13e
commit a937b30283
5 changed files with 298 additions and 0 deletions
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3
hw/misc/Kconfig
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@ -142,6 +142,9 @@ config AVR_POWER
config MCHP_PFSOC_DMC
bool
config MCHP_PFSOC_IOSCB
bool
config SIFIVE_TEST
bool