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aspeed queue:

Browse source 
* Removal of the swift-bmc machine
 * New Secure Boot Controller model
 * Improvements on the rainier machine
 * Various small cleanups
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Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20220227' into staging

aspeed queue:

* Removal of the swift-bmc machine
* New Secure Boot Controller model
* Improvements on the rainier machine
* Various small cleanups

# gpg: Signature made Sun 27 Feb 2022 08:45:45 GMT
# gpg:                using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B  0B60 51A3 43C7 CFFB ECA1

* remotes/legoater/tags/pull-aspeed-20220227:
  aspeed/sdmc: Add trace events
  aspeed/smc: Add an address mask on segment registers
  aspeed: Introduce a create_pca9552() helper
  aspeed: rainier: Add strap values taken from hardware
  aspeed: rainier: Add i2c LED devices
  ast2600: Add Secure Boot Controller model
  arm: Remove swift-bmc machine

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2022-02-28 16:46:45 +00:00
commit a8d39f5b5a
13 changed files with 236 additions and 79 deletions
Download patch file Download diff file Expand all files Collapse all files

3
include/hw/arm/aspeed_soc.h
View file

@ -24,6 +24,7 @@
#include "hw/misc/aspeed_i3c.h"
#include "hw/ssi/aspeed_smc.h"
#include "hw/misc/aspeed_hace.h"
#include "hw/misc/aspeed_sbc.h"
#include "hw/watchdog/wdt_aspeed.h"
#include "hw/net/ftgmac100.h"
#include "target/arm/cpu.h"
@ -60,6 +61,7 @@ struct AspeedSoCState {
AspeedSMCState fmc;
AspeedSMCState spi[ASPEED_SPIS_NUM];
EHCISysBusState ehci[ASPEED_EHCIS_NUM];
AspeedSBCState sbc;
AspeedSDMCState sdmc;
AspeedWDTState wdt[ASPEED_WDTS_NUM];
FTGMAC100State ftgmac100[ASPEED_MACS_NUM];
@ -109,6 +111,7 @@ enum {
ASPEED_DEV_SDMC,
ASPEED_DEV_SCU,
ASPEED_DEV_ADC,
ASPEED_DEV_SBC,
ASPEED_DEV_VIDEO,
ASPEED_DEV_SRAM,
ASPEED_DEV_SDHCI,

32
include/hw/misc/aspeed_sbc.h Normal file
View file

@ -0,0 +1,32 @@
/*
* ASPEED Secure Boot Controller
*
* Copyright (C) 2021-2022 IBM Corp.
*
* SPDX-License-Identifier: GPL-2.0-or-later
*/
#ifndef ASPEED_SBC_H
#define ASPEED_SBC_H
#include "hw/sysbus.h"
#define TYPE_ASPEED_SBC "aspeed.sbc"
#define TYPE_ASPEED_AST2600_SBC TYPE_ASPEED_SBC "-ast2600"
OBJECT_DECLARE_TYPE(AspeedSBCState, AspeedSBCClass, ASPEED_SBC)
#define ASPEED_SBC_NR_REGS (0x93c >> 2)
struct AspeedSBCState {
SysBusDevice parent;
MemoryRegion iomem;
uint32_t regs[ASPEED_SBC_NR_REGS];
};
struct AspeedSBCClass {
SysBusDeviceClass parent_class;
};
#endif /* _ASPEED_SBC_H_ */

1
include/hw/ssi/aspeed_smc.h
View file

@ -99,6 +99,7 @@ struct AspeedSMCClass {
uint8_t max_peripherals;
const uint32_t *resets;
const AspeedSegments *segments;
uint32_t segment_addr_mask;
hwaddr flash_window_base;
uint32_t flash_window_size;
uint32_t features;