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https://github.com/Motorhead1991/qemu.git
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Replace all occurances of __FUNCTION__ with __func__
Replace all occurs of __FUNCTION__ except for the check in checkpatch with the non GCC specific __func__. One line in hcd-musb.c was manually tweaked to pass checkpatch. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Anthony PERARD <anthony.perard@citrix.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> [THH: Removed hunks related to pxa2xx_mmci.c (fixed already)] Signed-off-by: Thomas Huth <thuth@redhat.com>
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7d8b00fa56
commit
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63 changed files with 269 additions and 269 deletions
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@ -161,7 +161,7 @@ static void omap_dma_channel_load(struct omap_dma_channel_s *ch)
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a->pck_element = 0;
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if (unlikely(!ch->elements || !ch->frames)) {
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printf("%s: bad DMA request\n", __FUNCTION__);
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printf("%s: bad DMA request\n", __func__);
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return;
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}
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@ -519,7 +519,7 @@ static void omap_dma_transfer_setup(struct soc_dma_ch_s *dma)
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continue;
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#endif
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printf("%s: Bus time-out in DMA%i operation\n",
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__FUNCTION__, dma->num);
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__func__, dma->num);
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}
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min_elems = INT_MAX;
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@ -879,14 +879,14 @@ static int omap_dma_ch_reg_write(struct omap_dma_s *s,
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ch->pack[0] = (value & 0x0040) >> 6;
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ch->port[0] = (enum omap_dma_port) ((value & 0x003c) >> 2);
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if (ch->port[0] >= __omap_dma_port_last)
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printf("%s: invalid DMA port %i\n", __FUNCTION__,
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printf("%s: invalid DMA port %i\n", __func__,
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ch->port[0]);
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if (ch->port[1] >= __omap_dma_port_last)
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printf("%s: invalid DMA port %i\n", __FUNCTION__,
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printf("%s: invalid DMA port %i\n", __func__,
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ch->port[1]);
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ch->data_type = 1 << (value & 3);
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if ((value & 3) == 3) {
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printf("%s: bad data_type for DMA channel\n", __FUNCTION__);
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printf("%s: bad data_type for DMA channel\n", __func__);
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ch->data_type >>= 1;
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}
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break;
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@ -1440,7 +1440,7 @@ static int omap_dma_sys_read(struct omap_dma_s *s, int offset,
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case 0x482: /* DMA_PCh1_SR */
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case 0x4c0: /* DMA_PChD_SR_0 */
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printf("%s: Physical Channel Status Registers not implemented.\n",
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__FUNCTION__);
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__func__);
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*ret = 0xff;
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break;
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@ -1898,13 +1898,13 @@ static void omap_dma4_write(void *opaque, hwaddr addr,
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omap_dma_reset(s->dma);
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s->ocp = value & 0x3321;
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if (((s->ocp >> 12) & 3) == 3) /* MIDLEMODE */
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fprintf(stderr, "%s: invalid DMA power mode\n", __FUNCTION__);
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fprintf(stderr, "%s: invalid DMA power mode\n", __func__);
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return;
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case 0x78: /* DMA4_GCR */
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s->gcr = value & 0x00ff00ff;
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if ((value & 0xff) == 0x00) /* MAX_CHANNEL_FIFO_DEPTH */
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fprintf(stderr, "%s: wrong FIFO depth in GCR\n", __FUNCTION__);
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fprintf(stderr, "%s: wrong FIFO depth in GCR\n", __func__);
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return;
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case 0x80 ... 0xfff:
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@ -1935,7 +1935,7 @@ static void omap_dma4_write(void *opaque, hwaddr addr,
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ch->src_sync = (value >> 24) & 1; /* XXX For CamDMA must be 1 */
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if (ch->buf_disable && !ch->src_sync)
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fprintf(stderr, "%s: Buffering disable is not allowed in "
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"destination synchronised mode\n", __FUNCTION__);
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"destination synchronised mode\n", __func__);
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ch->prefetch = (value >> 23) & 1;
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ch->bs = (value >> 18) & 1;
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ch->transparent_copy = (value >> 17) & 1;
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@ -1947,7 +1947,7 @@ static void omap_dma4_write(void *opaque, hwaddr addr,
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ch->fs = (value & 0x0020) >> 5;
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if (ch->fs && ch->bs && ch->mode[0] && ch->mode[1])
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fprintf(stderr, "%s: For a packet transfer at least one port "
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"must be constant-addressed\n", __FUNCTION__);
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"must be constant-addressed\n", __func__);
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ch->sync = (value & 0x001f) | ((value >> 14) & 0x0060);
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/* XXX must be 0x01 for CamDMA */
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@ -1978,7 +1978,7 @@ static void omap_dma4_write(void *opaque, hwaddr addr,
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ch->endian_lock[1] =(value >> 18) & 1;
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if (ch->endian[0] != ch->endian[1])
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fprintf(stderr, "%s: DMA endianness conversion enable attempt\n",
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__FUNCTION__);
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__func__);
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ch->write_mode = (value >> 16) & 3;
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ch->burst[1] = (value & 0xc000) >> 14;
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ch->pack[1] = (value & 0x2000) >> 13;
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@ -1988,10 +1988,10 @@ static void omap_dma4_write(void *opaque, hwaddr addr,
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ch->translate[0] = (value & 0x003c) >> 2;
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if (ch->translate[0] | ch->translate[1])
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fprintf(stderr, "%s: bad MReqAddressTranslate sideband signal\n",
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__FUNCTION__);
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__func__);
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ch->data_type = 1 << (value & 3);
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if ((value & 3) == 3) {
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printf("%s: bad data_type for DMA channel\n", __FUNCTION__);
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printf("%s: bad data_type for DMA channel\n", __func__);
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ch->data_type >>= 1;
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}
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break;
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@ -169,7 +169,7 @@ static inline void pxa2xx_dma_descriptor_fetch(
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s->chan[ch].dest &= ~3;
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if (s->chan[ch].cmd & (DCMD_CMPEN | DCMD_FLYBYS | DCMD_FLYBYT))
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printf("%s: unsupported mode in channel %i\n", __FUNCTION__, ch);
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printf("%s: unsupported mode in channel %i\n", __func__, ch);
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if (s->chan[ch].cmd & DCMD_STARTIRQEN)
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s->chan[ch].state |= DCSR_STARTINTR;
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@ -264,7 +264,7 @@ static uint64_t pxa2xx_dma_read(void *opaque, hwaddr offset,
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unsigned int channel;
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if (size != 4) {
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hw_error("%s: Bad access width\n", __FUNCTION__);
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hw_error("%s: Bad access width\n", __func__);
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return 5;
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}
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@ -312,7 +312,7 @@ static uint64_t pxa2xx_dma_read(void *opaque, hwaddr offset,
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}
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}
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hw_error("%s: Bad offset 0x" TARGET_FMT_plx "\n", __FUNCTION__, offset);
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hw_error("%s: Bad offset 0x" TARGET_FMT_plx "\n", __func__, offset);
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return 7;
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}
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@ -323,7 +323,7 @@ static void pxa2xx_dma_write(void *opaque, hwaddr offset,
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unsigned int channel;
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if (size != 4) {
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hw_error("%s: Bad access width\n", __FUNCTION__);
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hw_error("%s: Bad access width\n", __func__);
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return;
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}
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@ -337,7 +337,7 @@ static void pxa2xx_dma_write(void *opaque, hwaddr offset,
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if (value & DRCMR_MAPVLD)
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if ((value & DRCMR_CHLNUM) > s->channels)
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hw_error("%s: Bad DMA channel %i\n",
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__FUNCTION__, (unsigned)value & DRCMR_CHLNUM);
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__func__, (unsigned)value & DRCMR_CHLNUM);
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s->req[channel] = value;
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break;
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@ -416,7 +416,7 @@ static void pxa2xx_dma_write(void *opaque, hwaddr offset,
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break;
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}
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fail:
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hw_error("%s: Bad offset " TARGET_FMT_plx "\n", __FUNCTION__, offset);
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hw_error("%s: Bad offset " TARGET_FMT_plx "\n", __func__, offset);
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}
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}
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@ -431,7 +431,7 @@ static void pxa2xx_dma_request(void *opaque, int req_num, int on)
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PXA2xxDMAState *s = opaque;
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int ch;
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if (req_num < 0 || req_num >= PXA2XX_DMA_NUM_REQUESTS)
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hw_error("%s: Bad DMA request %i\n", __FUNCTION__, req_num);
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hw_error("%s: Bad DMA request %i\n", __func__, req_num);
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if (!(s->req[req_num] & DRCMR_MAPVLD))
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return;
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