hw/acpi: Generic Port Affinity Structure support

These are very similar to the recently added Generic Initiators
but instead of representing an initiator of memory traffic they
represent an edge point beyond which may lie either targets or
initiators.  Here we add these ports such that they may
be targets of hmat_lb records to describe the latency and
bandwidth from host side initiators to the port.  A discoverable
mechanism such as UEFI CDAT read from CXL devices and switches
is used to discover the remainder of the path, and the OS can build
up full latency and bandwidth numbers as need for work and data
placement decisions.

Acked-by: Markus Armbruster <armbru@redhat.com>
Tested-by: "Huang, Ying" <ying.huang@intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20240916174122.1843197-1-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Jonathan Cameron 2024-09-16 18:41:22 +01:00 committed by Michael S. Tsirkin
parent 43eb5e1f73
commit a82fe82916
9 changed files with 202 additions and 5 deletions

View file

@ -1954,6 +1954,19 @@ static void build_append_srat_pci_device_handle(GArray *table_data,
build_append_int_noprefix(table_data, 0, 12);
}
static void build_append_srat_acpi_device_handle(GArray *table_data,
const char *hid,
uint32_t uid)
{
assert(strlen(hid) == 8);
/* Device Handle - ACPI */
for (int i = 0; i < sizeof(hid); i++) {
build_append_int_noprefix(table_data, hid[i], 1);
}
build_append_int_noprefix(table_data, uid, 4);
build_append_int_noprefix(table_data, 0, 4);
}
/*
* ACPI spec, Revision 6.3
* 5.2.16.6 Generic Initiator Affinity Structure
@ -1981,6 +1994,32 @@ void build_srat_pci_generic_initiator(GArray *table_data, int node,
build_append_int_noprefix(table_data, 0, 4);
}
/*
* ACPI spec, Revision 6.5
* 5.2.16.7 Generic Port Affinity Structure
* With ACPI Device Handle.
*/
void build_srat_acpi_generic_port(GArray *table_data, uint32_t node,
const char *hid, uint32_t uid)
{
/* Type */
build_append_int_noprefix(table_data, 6, 1);
/* Length */
build_append_int_noprefix(table_data, 32, 1);
/* Reserved */
build_append_int_noprefix(table_data, 0, 1);
/* Device Handle Type: ACPI */
build_append_int_noprefix(table_data, 0, 1);
/* Proximity Domain */
build_append_int_noprefix(table_data, node, 4);
/* Device Handle */
build_append_srat_acpi_device_handle(table_data, hid, uid);
/* Flags - GP Enabled */
build_append_int_noprefix(table_data, 1, 4);
/* Reserved */
build_append_int_noprefix(table_data, 0, 4);
}
/*
* ACPI spec 5.2.17 System Locality Distance Information Table
* (Revision 2.0 or later)

View file

@ -30,6 +30,7 @@
#include "hw/boards.h"
#include "hw/acpi/aml-build.h"
#include "hw/acpi/pci.h"
#include "hw/pci/pci_bridge.h"
#include "hw/pci/pci_device.h"
#include "hw/pci/pcie_host.h"
@ -177,9 +178,122 @@ static int build_acpi_generic_initiator(Object *obj, void *opaque)
return 0;
}
void build_srat_generic_pci_initiator(GArray *table_data)
typedef struct AcpiGenericPort {
/* private */
Object parent;
/* public */
char *pci_bus;
uint32_t node;
} AcpiGenericPort;
typedef struct AcpiGenericPortClass {
ObjectClass parent_class;
} AcpiGenericPortClass;
#define TYPE_ACPI_GENERIC_PORT "acpi-generic-port"
OBJECT_DEFINE_TYPE_WITH_INTERFACES(AcpiGenericPort, acpi_generic_port,
ACPI_GENERIC_PORT, OBJECT,
{ TYPE_USER_CREATABLE },
{ NULL })
OBJECT_DECLARE_SIMPLE_TYPE(AcpiGenericPort, ACPI_GENERIC_PORT)
static void acpi_generic_port_init(Object *obj)
{
AcpiGenericPort *gp = ACPI_GENERIC_PORT(obj);
gp->node = MAX_NODES;
gp->pci_bus = NULL;
}
static void acpi_generic_port_finalize(Object *obj)
{
AcpiGenericPort *gp = ACPI_GENERIC_PORT(obj);
g_free(gp->pci_bus);
}
static void acpi_generic_port_set_pci_bus(Object *obj, const char *val,
Error **errp)
{
AcpiGenericPort *gp = ACPI_GENERIC_PORT(obj);
gp->pci_bus = g_strdup(val);
}
static void acpi_generic_port_set_node(Object *obj, Visitor *v,
const char *name, void *opaque,
Error **errp)
{
AcpiGenericPort *gp = ACPI_GENERIC_PORT(obj);
uint32_t value;
if (!visit_type_uint32(v, name, &value, errp)) {
return;
}
if (value >= MAX_NODES) {
error_printf("%s: Invalid NUMA node specified\n",
TYPE_ACPI_GENERIC_INITIATOR);
exit(1);
}
gp->node = value;
}
static void acpi_generic_port_class_init(ObjectClass *oc, void *data)
{
object_class_property_add_str(oc, "pci-bus", NULL,
acpi_generic_port_set_pci_bus);
object_class_property_set_description(oc, "pci-bus",
"PCI Bus of the host bridge associated with this GP affinity structure");
object_class_property_add(oc, "node", "int", NULL,
acpi_generic_port_set_node, NULL, NULL);
object_class_property_set_description(oc, "node",
"The NUMA node like ID to index HMAT/SLIT NUMA properties involving GP");
}
static int build_acpi_generic_port(Object *obj, void *opaque)
{
MachineState *ms = MACHINE(qdev_get_machine());
const char *hid = "ACPI0016";
GArray *table_data = opaque;
AcpiGenericPort *gp;
uint32_t uid;
Object *o;
if (!object_dynamic_cast(obj, TYPE_ACPI_GENERIC_PORT)) {
return 0;
}
gp = ACPI_GENERIC_PORT(obj);
if (gp->node >= ms->numa_state->num_nodes) {
error_printf("%s: node %d is invalid.\n",
TYPE_ACPI_GENERIC_PORT, gp->node);
exit(1);
}
o = object_resolve_path_type(gp->pci_bus, TYPE_PXB_CXL_BUS, NULL);
if (!o) {
error_printf("%s: device must be a CXL host bridge.\n",
TYPE_ACPI_GENERIC_PORT);
exit(1);
}
uid = object_property_get_uint(o, "acpi_uid", &error_fatal);
build_srat_acpi_generic_port(table_data, gp->node, hid, uid);
return 0;
}
void build_srat_generic_affinity_structures(GArray *table_data)
{
object_child_foreach_recursive(object_get_root(),
build_acpi_generic_initiator,
table_data);
object_child_foreach_recursive(object_get_root(), build_acpi_generic_port,
table_data);
}

View file

@ -510,7 +510,7 @@ build_srat(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
}
}
build_srat_generic_pci_initiator(table_data);
build_srat_generic_affinity_structures(table_data);
if (ms->nvdimms_state->is_enabled) {
nvdimm_build_srat(table_data);

View file

@ -1973,7 +1973,7 @@ build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
build_srat_memory(table_data, 0, 0, 0, MEM_AFFINITY_NOFLAGS);
}
build_srat_generic_pci_initiator(table_data);
build_srat_generic_affinity_structures(table_data);
/*
* Entry is required for Windows to enable memory hotplug in OS

View file

@ -38,7 +38,6 @@ DECLARE_INSTANCE_CHECKER(PXBBus, PXB_BUS,
DECLARE_INSTANCE_CHECKER(PXBBus, PXB_PCIE_BUS,
TYPE_PXB_PCIE_BUS)
#define TYPE_PXB_CXL_BUS "pxb-cxl-bus"
DECLARE_INSTANCE_CHECKER(PXBBus, PXB_CXL_BUS,
TYPE_PXB_CXL_BUS)