mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-01 23:03:54 -06:00
Rename target_phys_addr_t to hwaddr
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are
reserved) and its purpose doesn't match the name (most target_phys_addr_t
addresses are not target specific). Replace it with a finger-friendly,
standards conformant hwaddr.
Outstanding patchsets can be fixed up with the command
git rebase -i --exec 'find -name "*.[ch]"
| xargs s/target_phys_addr_t/hwaddr/g' origin
Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Avi Kivity
Anthony Liguori
parent
50d2b4d93f
commit
a8170e5e97
383 changed files with 2240 additions and 2240 deletions
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@ -583,10 +583,10 @@ static inline int tlb_compare_context(const SparcTLBEntry *tlb,
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/* cpu-exec.c */
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#if !defined(CONFIG_USER_ONLY)
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void cpu_unassigned_access(CPUSPARCState *env1, target_phys_addr_t addr,
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void cpu_unassigned_access(CPUSPARCState *env1, hwaddr addr,
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int is_write, int is_exec, int is_asi, int size);
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#if defined(TARGET_SPARC64)
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target_phys_addr_t cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr,
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hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr,
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int mmu_idx);
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#endif
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#endif
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@ -619,21 +619,21 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong addr, int asi, int size,
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case 0x21 ... 0x2f: /* MMU passthrough, 0x100000000 to 0xfffffffff */
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switch (size) {
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case 1:
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ret = ldub_phys((target_phys_addr_t)addr
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| ((target_phys_addr_t)(asi & 0xf) << 32));
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ret = ldub_phys((hwaddr)addr
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| ((hwaddr)(asi & 0xf) << 32));
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break;
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case 2:
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ret = lduw_phys((target_phys_addr_t)addr
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| ((target_phys_addr_t)(asi & 0xf) << 32));
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ret = lduw_phys((hwaddr)addr
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| ((hwaddr)(asi & 0xf) << 32));
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break;
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default:
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case 4:
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ret = ldl_phys((target_phys_addr_t)addr
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| ((target_phys_addr_t)(asi & 0xf) << 32));
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ret = ldl_phys((hwaddr)addr
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| ((hwaddr)(asi & 0xf) << 32));
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break;
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case 8:
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ret = ldq_phys((target_phys_addr_t)addr
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| ((target_phys_addr_t)(asi & 0xf) << 32));
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ret = ldq_phys((hwaddr)addr
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| ((hwaddr)(asi & 0xf) << 32));
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break;
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}
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break;
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@ -1015,21 +1015,21 @@ void helper_st_asi(CPUSPARCState *env, target_ulong addr, uint64_t val, int asi,
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{
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switch (size) {
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case 1:
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stb_phys((target_phys_addr_t)addr
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| ((target_phys_addr_t)(asi & 0xf) << 32), val);
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stb_phys((hwaddr)addr
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| ((hwaddr)(asi & 0xf) << 32), val);
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break;
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case 2:
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stw_phys((target_phys_addr_t)addr
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| ((target_phys_addr_t)(asi & 0xf) << 32), val);
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stw_phys((hwaddr)addr
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| ((hwaddr)(asi & 0xf) << 32), val);
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break;
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case 4:
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default:
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stl_phys((target_phys_addr_t)addr
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| ((target_phys_addr_t)(asi & 0xf) << 32), val);
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stl_phys((hwaddr)addr
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| ((hwaddr)(asi & 0xf) << 32), val);
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break;
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case 8:
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stq_phys((target_phys_addr_t)addr
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| ((target_phys_addr_t)(asi & 0xf) << 32), val);
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stq_phys((hwaddr)addr
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| ((hwaddr)(asi & 0xf) << 32), val);
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break;
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}
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}
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@ -2313,7 +2313,7 @@ void helper_stqf(CPUSPARCState *env, target_ulong addr, int mem_idx)
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#if !defined(CONFIG_USER_ONLY)
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#ifndef TARGET_SPARC64
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void cpu_unassigned_access(CPUSPARCState *env, target_phys_addr_t addr,
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void cpu_unassigned_access(CPUSPARCState *env, hwaddr addr,
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int is_write, int is_exec, int is_asi, int size)
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{
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int fault_type;
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@ -2373,7 +2373,7 @@ void cpu_unassigned_access(CPUSPARCState *env, target_phys_addr_t addr,
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}
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}
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#else
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void cpu_unassigned_access(CPUSPARCState *env, target_phys_addr_t addr,
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void cpu_unassigned_access(CPUSPARCState *env, hwaddr addr,
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int is_write, int is_exec, int is_asi, int size)
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{
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#ifdef DEBUG_UNASSIGNED
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@ -76,13 +76,13 @@ static const int perm_table[2][8] = {
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}
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};
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static int get_physical_address(CPUSPARCState *env, target_phys_addr_t *physical,
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static int get_physical_address(CPUSPARCState *env, hwaddr *physical,
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int *prot, int *access_index,
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target_ulong address, int rw, int mmu_idx,
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target_ulong *page_size)
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{
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int access_perms = 0;
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target_phys_addr_t pde_ptr;
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hwaddr pde_ptr;
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uint32_t pde;
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int error_code = 0, is_dirty, is_user;
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unsigned long page_offset;
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@ -192,7 +192,7 @@ static int get_physical_address(CPUSPARCState *env, target_phys_addr_t *physical
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/* Even if large ptes, we map only one 4KB page in the cache to
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avoid filling it too fast */
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*physical = ((target_phys_addr_t)(pde & PTE_ADDR_MASK) << 4) + page_offset;
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*physical = ((hwaddr)(pde & PTE_ADDR_MASK) << 4) + page_offset;
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return error_code;
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}
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@ -200,7 +200,7 @@ static int get_physical_address(CPUSPARCState *env, target_phys_addr_t *physical
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int cpu_sparc_handle_mmu_fault(CPUSPARCState *env, target_ulong address, int rw,
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int mmu_idx)
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{
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target_phys_addr_t paddr;
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hwaddr paddr;
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target_ulong vaddr;
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target_ulong page_size;
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int error_code = 0, prot, access_index;
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@ -244,11 +244,11 @@ int cpu_sparc_handle_mmu_fault(CPUSPARCState *env, target_ulong address, int rw,
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target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev)
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{
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target_phys_addr_t pde_ptr;
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hwaddr pde_ptr;
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uint32_t pde;
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/* Context base + context number */
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pde_ptr = (target_phys_addr_t)(env->mmuregs[1] << 4) +
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pde_ptr = (hwaddr)(env->mmuregs[1] << 4) +
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(env->mmuregs[2] << 2);
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pde = ldl_phys(pde_ptr);
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@ -312,13 +312,13 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env)
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{
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target_ulong va, va1, va2;
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unsigned int n, m, o;
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target_phys_addr_t pde_ptr, pa;
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hwaddr pde_ptr, pa;
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uint32_t pde;
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pde_ptr = (env->mmuregs[1] << 4) + (env->mmuregs[2] << 2);
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pde = ldl_phys(pde_ptr);
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(*cpu_fprintf)(f, "Root ptr: " TARGET_FMT_plx ", ctx: %d\n",
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(target_phys_addr_t)env->mmuregs[1] << 4, env->mmuregs[2]);
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(hwaddr)env->mmuregs[1] << 4, env->mmuregs[2]);
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for (n = 0, va = 0; n < 256; n++, va += 16 * 1024 * 1024) {
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pde = mmu_probe(env, va, 2);
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if (pde) {
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@ -431,7 +431,7 @@ int target_memory_rw_debug(CPUSPARCState *env, target_ulong addr,
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#else /* !TARGET_SPARC64 */
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/* 41 bit physical address space */
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static inline target_phys_addr_t ultrasparc_truncate_physical(uint64_t x)
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static inline hwaddr ultrasparc_truncate_physical(uint64_t x)
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{
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return x & 0x1ffffffffffULL;
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}
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@ -445,7 +445,7 @@ static inline target_phys_addr_t ultrasparc_truncate_physical(uint64_t x)
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entry size */
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static inline int ultrasparc_tag_match(SparcTLBEntry *tlb,
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uint64_t address, uint64_t context,
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target_phys_addr_t *physical)
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hwaddr *physical)
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{
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uint64_t mask;
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@ -478,7 +478,7 @@ static inline int ultrasparc_tag_match(SparcTLBEntry *tlb,
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}
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static int get_physical_address_data(CPUSPARCState *env,
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target_phys_addr_t *physical, int *prot,
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hwaddr *physical, int *prot,
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target_ulong address, int rw, int mmu_idx)
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{
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unsigned int i;
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@ -597,7 +597,7 @@ static int get_physical_address_data(CPUSPARCState *env,
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}
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static int get_physical_address_code(CPUSPARCState *env,
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target_phys_addr_t *physical, int *prot,
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hwaddr *physical, int *prot,
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target_ulong address, int mmu_idx)
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{
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unsigned int i;
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@ -665,7 +665,7 @@ static int get_physical_address_code(CPUSPARCState *env,
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return 1;
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}
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static int get_physical_address(CPUSPARCState *env, target_phys_addr_t *physical,
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static int get_physical_address(CPUSPARCState *env, hwaddr *physical,
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int *prot, int *access_index,
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target_ulong address, int rw, int mmu_idx,
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target_ulong *page_size)
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@ -703,7 +703,7 @@ int cpu_sparc_handle_mmu_fault(CPUSPARCState *env, target_ulong address, int rw,
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int mmu_idx)
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{
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target_ulong vaddr;
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target_phys_addr_t paddr;
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hwaddr paddr;
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target_ulong page_size;
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int error_code = 0, prot, access_index;
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@ -810,7 +810,7 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env)
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#endif /* TARGET_SPARC64 */
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static int cpu_sparc_get_phys_page(CPUSPARCState *env, target_phys_addr_t *phys,
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static int cpu_sparc_get_phys_page(CPUSPARCState *env, hwaddr *phys,
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target_ulong addr, int rw, int mmu_idx)
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{
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target_ulong page_size;
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@ -821,10 +821,10 @@ static int cpu_sparc_get_phys_page(CPUSPARCState *env, target_phys_addr_t *phys,
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}
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#if defined(TARGET_SPARC64)
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target_phys_addr_t cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr,
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hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr,
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int mmu_idx)
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{
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target_phys_addr_t phys_addr;
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hwaddr phys_addr;
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if (cpu_sparc_get_phys_page(env, &phys_addr, addr, 4, mmu_idx) != 0) {
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return -1;
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@ -833,9 +833,9 @@ target_phys_addr_t cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong ad
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}
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#endif
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target_phys_addr_t cpu_get_phys_page_debug(CPUSPARCState *env, target_ulong addr)
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hwaddr cpu_get_phys_page_debug(CPUSPARCState *env, target_ulong addr)
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{
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target_phys_addr_t phys_addr;
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hwaddr phys_addr;
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int mmu_idx = cpu_mmu_index(env);
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MemoryRegionSection section;
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