mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-03 07:43:54 -06:00
Rename target_phys_addr_t to hwaddr
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
parent
50d2b4d93f
commit
a8170e5e97
383 changed files with 2240 additions and 2240 deletions
|
@ -8,7 +8,7 @@
|
|||
#ifndef CONFIG_USER_ONLY
|
||||
static inline int get_phys_addr(CPUARMState *env, uint32_t address,
|
||||
int access_type, int is_user,
|
||||
target_phys_addr_t *phys_ptr, int *prot,
|
||||
hwaddr *phys_ptr, int *prot,
|
||||
target_ulong *page_size);
|
||||
#endif
|
||||
|
||||
|
@ -517,7 +517,7 @@ static inline bool extended_addresses_enabled(CPUARMState *env)
|
|||
|
||||
static int ats_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value)
|
||||
{
|
||||
target_phys_addr_t phys_addr;
|
||||
hwaddr phys_addr;
|
||||
target_ulong page_size;
|
||||
int prot;
|
||||
int ret, is_user = ri->opc2 & 2;
|
||||
|
@ -1980,7 +1980,7 @@ static uint32_t get_level1_table_address(CPUARMState *env, uint32_t address)
|
|||
}
|
||||
|
||||
static int get_phys_addr_v5(CPUARMState *env, uint32_t address, int access_type,
|
||||
int is_user, target_phys_addr_t *phys_ptr,
|
||||
int is_user, hwaddr *phys_ptr,
|
||||
int *prot, target_ulong *page_size)
|
||||
{
|
||||
int code;
|
||||
|
@ -1990,7 +1990,7 @@ static int get_phys_addr_v5(CPUARMState *env, uint32_t address, int access_type,
|
|||
int ap;
|
||||
int domain;
|
||||
int domain_prot;
|
||||
target_phys_addr_t phys_addr;
|
||||
hwaddr phys_addr;
|
||||
|
||||
/* Pagetable walk. */
|
||||
/* Lookup l1 descriptor. */
|
||||
|
@ -2075,7 +2075,7 @@ do_fault:
|
|||
}
|
||||
|
||||
static int get_phys_addr_v6(CPUARMState *env, uint32_t address, int access_type,
|
||||
int is_user, target_phys_addr_t *phys_ptr,
|
||||
int is_user, hwaddr *phys_ptr,
|
||||
int *prot, target_ulong *page_size)
|
||||
{
|
||||
int code;
|
||||
|
@ -2087,7 +2087,7 @@ static int get_phys_addr_v6(CPUARMState *env, uint32_t address, int access_type,
|
|||
int ap;
|
||||
int domain = 0;
|
||||
int domain_prot;
|
||||
target_phys_addr_t phys_addr;
|
||||
hwaddr phys_addr;
|
||||
|
||||
/* Pagetable walk. */
|
||||
/* Lookup l1 descriptor. */
|
||||
|
@ -2197,7 +2197,7 @@ typedef enum {
|
|||
|
||||
static int get_phys_addr_lpae(CPUARMState *env, uint32_t address,
|
||||
int access_type, int is_user,
|
||||
target_phys_addr_t *phys_ptr, int *prot,
|
||||
hwaddr *phys_ptr, int *prot,
|
||||
target_ulong *page_size_ptr)
|
||||
{
|
||||
/* Read an LPAE long-descriptor translation table. */
|
||||
|
@ -2208,7 +2208,7 @@ static int get_phys_addr_lpae(CPUARMState *env, uint32_t address,
|
|||
uint64_t ttbr;
|
||||
int ttbr_select;
|
||||
int n;
|
||||
target_phys_addr_t descaddr;
|
||||
hwaddr descaddr;
|
||||
uint32_t tableattrs;
|
||||
target_ulong page_size;
|
||||
uint32_t attrs;
|
||||
|
@ -2366,7 +2366,7 @@ do_fault:
|
|||
|
||||
static int get_phys_addr_mpu(CPUARMState *env, uint32_t address,
|
||||
int access_type, int is_user,
|
||||
target_phys_addr_t *phys_ptr, int *prot)
|
||||
hwaddr *phys_ptr, int *prot)
|
||||
{
|
||||
int n;
|
||||
uint32_t mask;
|
||||
|
@ -2450,7 +2450,7 @@ static int get_phys_addr_mpu(CPUARMState *env, uint32_t address,
|
|||
*/
|
||||
static inline int get_phys_addr(CPUARMState *env, uint32_t address,
|
||||
int access_type, int is_user,
|
||||
target_phys_addr_t *phys_ptr, int *prot,
|
||||
hwaddr *phys_ptr, int *prot,
|
||||
target_ulong *page_size)
|
||||
{
|
||||
/* Fast Context Switch Extension. */
|
||||
|
@ -2482,7 +2482,7 @@ static inline int get_phys_addr(CPUARMState *env, uint32_t address,
|
|||
int cpu_arm_handle_mmu_fault (CPUARMState *env, target_ulong address,
|
||||
int access_type, int mmu_idx)
|
||||
{
|
||||
target_phys_addr_t phys_addr;
|
||||
hwaddr phys_addr;
|
||||
target_ulong page_size;
|
||||
int prot;
|
||||
int ret, is_user;
|
||||
|
@ -2492,7 +2492,7 @@ int cpu_arm_handle_mmu_fault (CPUARMState *env, target_ulong address,
|
|||
&page_size);
|
||||
if (ret == 0) {
|
||||
/* Map a single [sub]page. */
|
||||
phys_addr &= ~(target_phys_addr_t)0x3ff;
|
||||
phys_addr &= ~(hwaddr)0x3ff;
|
||||
address &= ~(uint32_t)0x3ff;
|
||||
tlb_set_page (env, address, phys_addr, prot, mmu_idx, page_size);
|
||||
return 0;
|
||||
|
@ -2512,9 +2512,9 @@ int cpu_arm_handle_mmu_fault (CPUARMState *env, target_ulong address,
|
|||
return 1;
|
||||
}
|
||||
|
||||
target_phys_addr_t cpu_get_phys_page_debug(CPUARMState *env, target_ulong addr)
|
||||
hwaddr cpu_get_phys_page_debug(CPUARMState *env, target_ulong addr)
|
||||
{
|
||||
target_phys_addr_t phys_addr;
|
||||
hwaddr phys_addr;
|
||||
target_ulong page_size;
|
||||
int prot;
|
||||
int ret;
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue