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Rename target_phys_addr_t to hwaddr

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target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are
reserved) and its purpose doesn't match the name (most target_phys_addr_t
addresses are not target specific).  Replace it with a finger-friendly,
standards conformant hwaddr.

Outstanding patchsets can be fixed up with the command

  git rebase -i --exec 'find -name "*.[ch]"
                        | xargs s/target_phys_addr_t/hwaddr/g' origin

Signed-off-by: Avi Kivity <avi@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Avi Kivity 2012-10-23 12:30:10 +02:00 • committed by Anthony Liguori
parent 50d2b4d93f
commit a8170e5e97
383 changed files with 2240 additions and 2240 deletions
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10
hw/sh_timer.c
View file

@ -59,7 +59,7 @@ static void sh_timer_update(sh_timer_state *s)
s->int_level = new_level;
}
static uint32_t sh_timer_read(void *opaque, target_phys_addr_t offset)
static uint32_t sh_timer_read(void *opaque, hwaddr offset)
{
sh_timer_state *s = (sh_timer_state *)opaque;
@ -79,7 +79,7 @@ static uint32_t sh_timer_read(void *opaque, target_phys_addr_t offset)
}
}
static void sh_timer_write(void *opaque, target_phys_addr_t offset,
static void sh_timer_write(void *opaque, hwaddr offset,
uint32_t value)
{
sh_timer_state *s = (sh_timer_state *)opaque;
@ -222,7 +222,7 @@ typedef struct {
int feat;
} tmu012_state;
static uint64_t tmu012_read(void *opaque, target_phys_addr_t offset,
static uint64_t tmu012_read(void *opaque, hwaddr offset,
unsigned size)
{
tmu012_state *s = (tmu012_state *)opaque;
@ -253,7 +253,7 @@ static uint64_t tmu012_read(void *opaque, target_phys_addr_t offset,
return 0;
}
static void tmu012_write(void *opaque, target_phys_addr_t offset,
static void tmu012_write(void *opaque, hwaddr offset,
uint64_t value, unsigned size)
{
tmu012_state *s = (tmu012_state *)opaque;
@ -303,7 +303,7 @@ static const MemoryRegionOps tmu012_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
void tmu012_init(MemoryRegion *sysmem, target_phys_addr_t base,
void tmu012_init(MemoryRegion *sysmem, hwaddr base,
int feat, uint32_t freq,
qemu_irq ch0_irq, qemu_irq ch1_irq,
qemu_irq ch2_irq0, qemu_irq ch2_irq1)