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Rename target_phys_addr_t to hwaddr
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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50d2b4d93f
commit
a8170e5e97
383 changed files with 2240 additions and 2240 deletions
68
cpu-common.h
68
cpu-common.h
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@ -3,7 +3,7 @@
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/* CPU interfaces that are target independent. */
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#include "targphys.h"
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#include "hwaddr.h"
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#ifndef NEED_CPU_H
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#include "poison.h"
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@ -33,8 +33,8 @@ typedef uintptr_t ram_addr_t;
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/* memory API */
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typedef void CPUWriteMemoryFunc(void *opaque, target_phys_addr_t addr, uint32_t value);
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typedef uint32_t CPUReadMemoryFunc(void *opaque, target_phys_addr_t addr);
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typedef void CPUWriteMemoryFunc(void *opaque, hwaddr addr, uint32_t value);
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typedef uint32_t CPUReadMemoryFunc(void *opaque, hwaddr addr);
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void qemu_ram_remap(ram_addr_t addr, ram_addr_t length);
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/* This should only be used for ram local to a device. */
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@ -49,27 +49,27 @@ int qemu_ram_addr_from_host(void *ptr, ram_addr_t *ram_addr);
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ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr);
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void qemu_ram_set_idstr(ram_addr_t addr, const char *name, DeviceState *dev);
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void cpu_physical_memory_rw(target_phys_addr_t addr, uint8_t *buf,
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void cpu_physical_memory_rw(hwaddr addr, uint8_t *buf,
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int len, int is_write);
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static inline void cpu_physical_memory_read(target_phys_addr_t addr,
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static inline void cpu_physical_memory_read(hwaddr addr,
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void *buf, int len)
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{
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cpu_physical_memory_rw(addr, buf, len, 0);
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}
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static inline void cpu_physical_memory_write(target_phys_addr_t addr,
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static inline void cpu_physical_memory_write(hwaddr addr,
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const void *buf, int len)
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{
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cpu_physical_memory_rw(addr, (void *)buf, len, 1);
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}
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void *cpu_physical_memory_map(target_phys_addr_t addr,
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target_phys_addr_t *plen,
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void *cpu_physical_memory_map(hwaddr addr,
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hwaddr *plen,
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int is_write);
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void cpu_physical_memory_unmap(void *buffer, target_phys_addr_t len,
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int is_write, target_phys_addr_t access_len);
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void cpu_physical_memory_unmap(void *buffer, hwaddr len,
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int is_write, hwaddr access_len);
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void *cpu_register_map_client(void *opaque, void (*callback)(void *opaque));
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void cpu_unregister_map_client(void *cookie);
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bool cpu_physical_memory_is_io(target_phys_addr_t phys_addr);
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bool cpu_physical_memory_is_io(hwaddr phys_addr);
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/* Coalesced MMIO regions are areas where write operations can be reordered.
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* This usually implies that write operations are side-effect free. This allows
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@ -78,33 +78,33 @@ bool cpu_physical_memory_is_io(target_phys_addr_t phys_addr);
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*/
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void qemu_flush_coalesced_mmio_buffer(void);
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uint32_t ldub_phys(target_phys_addr_t addr);
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uint32_t lduw_le_phys(target_phys_addr_t addr);
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uint32_t lduw_be_phys(target_phys_addr_t addr);
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uint32_t ldl_le_phys(target_phys_addr_t addr);
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uint32_t ldl_be_phys(target_phys_addr_t addr);
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uint64_t ldq_le_phys(target_phys_addr_t addr);
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uint64_t ldq_be_phys(target_phys_addr_t addr);
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void stb_phys(target_phys_addr_t addr, uint32_t val);
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void stw_le_phys(target_phys_addr_t addr, uint32_t val);
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void stw_be_phys(target_phys_addr_t addr, uint32_t val);
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void stl_le_phys(target_phys_addr_t addr, uint32_t val);
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void stl_be_phys(target_phys_addr_t addr, uint32_t val);
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void stq_le_phys(target_phys_addr_t addr, uint64_t val);
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void stq_be_phys(target_phys_addr_t addr, uint64_t val);
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uint32_t ldub_phys(hwaddr addr);
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uint32_t lduw_le_phys(hwaddr addr);
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uint32_t lduw_be_phys(hwaddr addr);
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uint32_t ldl_le_phys(hwaddr addr);
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uint32_t ldl_be_phys(hwaddr addr);
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uint64_t ldq_le_phys(hwaddr addr);
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uint64_t ldq_be_phys(hwaddr addr);
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void stb_phys(hwaddr addr, uint32_t val);
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void stw_le_phys(hwaddr addr, uint32_t val);
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void stw_be_phys(hwaddr addr, uint32_t val);
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void stl_le_phys(hwaddr addr, uint32_t val);
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void stl_be_phys(hwaddr addr, uint32_t val);
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void stq_le_phys(hwaddr addr, uint64_t val);
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void stq_be_phys(hwaddr addr, uint64_t val);
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#ifdef NEED_CPU_H
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uint32_t lduw_phys(target_phys_addr_t addr);
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uint32_t ldl_phys(target_phys_addr_t addr);
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uint64_t ldq_phys(target_phys_addr_t addr);
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void stl_phys_notdirty(target_phys_addr_t addr, uint32_t val);
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void stq_phys_notdirty(target_phys_addr_t addr, uint64_t val);
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void stw_phys(target_phys_addr_t addr, uint32_t val);
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void stl_phys(target_phys_addr_t addr, uint32_t val);
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void stq_phys(target_phys_addr_t addr, uint64_t val);
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uint32_t lduw_phys(hwaddr addr);
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uint32_t ldl_phys(hwaddr addr);
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uint64_t ldq_phys(hwaddr addr);
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void stl_phys_notdirty(hwaddr addr, uint32_t val);
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void stq_phys_notdirty(hwaddr addr, uint64_t val);
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void stw_phys(hwaddr addr, uint32_t val);
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void stl_phys(hwaddr addr, uint32_t val);
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void stq_phys(hwaddr addr, uint64_t val);
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#endif
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void cpu_physical_memory_write_rom(target_phys_addr_t addr,
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void cpu_physical_memory_write_rom(hwaddr addr,
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const uint8_t *buf, int len);
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extern struct MemoryRegion io_mem_ram;
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