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malta: Move PCI interrupt handling from gt64xxx_pci to piix4
Handling PCI interrupts in piix4 increases cohesion and reduces differences between piix4 and piix3. Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220217101924.15347-3-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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parent
c291635867
commit
a7fc988051
4 changed files with 62 additions and 61 deletions
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@ -45,6 +45,7 @@ struct PIIX4State {
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PCIDevice dev;
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qemu_irq cpu_intr;
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qemu_irq *isa;
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qemu_irq i8259[ISA_NUM_IRQS];
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RTCState rtc;
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/* Reset Control Register */
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@ -54,6 +55,27 @@ struct PIIX4State {
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OBJECT_DECLARE_SIMPLE_TYPE(PIIX4State, PIIX4_PCI_DEVICE)
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static void piix4_set_irq(void *opaque, int irq_num, int level)
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{
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int i, pic_irq, pic_level;
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qemu_irq *pic = opaque;
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PCIBus *bus = pci_get_bus(piix4_dev);
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/* now we change the pic irq level according to the piix irq mappings */
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/* XXX: optimize */
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pic_irq = piix4_dev->config[PIIX_PIRQCA + irq_num];
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if (pic_irq < 16) {
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/* The pic level is the logical OR of all the PCI irqs mapped to it. */
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pic_level = 0;
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for (i = 0; i < 4; i++) {
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if (pic_irq == piix4_dev->config[PIIX_PIRQCA + i]) {
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pic_level |= pci_bus_get_irq_level(bus, i);
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}
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}
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qemu_set_irq(pic[pic_irq], pic_level);
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}
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}
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static void piix4_isa_reset(DeviceState *dev)
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{
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PIIX4State *d = PIIX4_PCI_DEVICE(dev);
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@ -248,8 +270,34 @@ static void piix4_register_types(void)
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type_init(piix4_register_types)
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static int pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num)
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{
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int slot;
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slot = PCI_SLOT(pci_dev->devfn);
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switch (slot) {
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/* PIIX4 USB */
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case 10:
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return 3;
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/* AMD 79C973 Ethernet */
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case 11:
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return 1;
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/* Crystal 4281 Sound */
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case 12:
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return 2;
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/* PCI slot 1 to 4 */
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case 18 ... 21:
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return ((slot - 18) + irq_num) & 0x03;
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/* Unknown device, don't do any translation */
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default:
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return irq_num;
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}
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}
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DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus)
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{
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PIIX4State *s;
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PCIDevice *pci;
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DeviceState *dev;
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int devfn = PCI_DEVFN(10, 0);
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@ -257,6 +305,7 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus)
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pci = pci_create_simple_multifunction(pci_bus, devfn, true,
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TYPE_PIIX4_PCI_DEVICE);
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dev = DEVICE(pci);
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s = PIIX4_PCI_DEVICE(pci);
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if (isa_bus) {
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*isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0"));
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}
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@ -271,5 +320,11 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus)
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NULL, 0, NULL);
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}
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pci_bus_irqs(pci_bus, piix4_set_irq, pci_slot_get_pirq, s->i8259, 4);
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for (int i = 0; i < ISA_NUM_IRQS; i++) {
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s->i8259[i] = qdev_get_gpio_in_named(dev, "isa", i);
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}
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return dev;
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}
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