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target/s390x: Fix MXDB and MXDBR

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These instructions multiply 64 bits by 64 bits, not 128 bits by 64 bits.

Reported-by: Tulio Magno Quites Machado Filho <tuliom@redhat.com>
Fixes: 2b91240f95 ("target/s390x: Use Int128 for passing float128")
Cc: qemu-stable@nongnu.org
Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=2211472
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <20230601223027.795501-2-iii@linux.ibm.com>
Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
Ilya Leoshkevich 2023-06-02 00:30:26 +02:00 • committed by Thomas Huth
parent 0db0fbb5cf
commit a7f4add793
4 changed files with 7 additions and 12 deletions
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8
target/s390x/tcg/translate.c
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@ -3421,7 +3421,7 @@ static DisasJumpType op_mxb(DisasContext *s, DisasOps *o)
static DisasJumpType op_mxdb(DisasContext *s, DisasOps *o)
{
gen_helper_mxdb(o->out_128, cpu_env, o->in1_128, o->in2);
gen_helper_mxdb(o->out_128, cpu_env, o->in1, o->in2);
return DISAS_NEXT;
}
@ -5183,12 +5183,6 @@ static void prep_r1_P(DisasContext *s, DisasOps *o)
}
#define SPEC_prep_r1_P SPEC_r1_even
static void prep_x1(DisasContext *s, DisasOps *o)
{
o->out_128 = load_freg_128(get_field(s, r1));
}
#define SPEC_prep_x1 SPEC_r1_f128
/* ====================================================================== */
/* The "Write OUTput" generators. These generally perform some non-trivial
copy of data to TCG globals, or to main memory. The trivial cases are