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target/mips: Set FloatInfZeroNaNRule explicitly

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Set the FloatInfZeroNaNRule explicitly for the MIPS target,
so we can remove the ifdef from pickNaNMulAdd().

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20241202131347.498124-9-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2024-12-11 15:30:54 +00:00
parent 6f759b179f
commit a71492f726
3 changed files with 14 additions and 15 deletions
Download patch file Download diff file Expand all files Collapse all files

16
fpu/softfloat-specialize.c.inc
View file

@ -489,21 +489,7 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_cls,
/* /*
* Temporarily fall back to ifdef ladder * Temporarily fall back to ifdef ladder
*/ */
#if defined(TARGET_MIPS) #if defined(TARGET_SPARC) || \
if (snan_bit_is_one(status)) {
/*
* For MIPS systems that conform to IEEE754-1985, the (inf,zero,nan)
* case sets InvalidOp and returns the default NaN
*/
rule = float_infzeronan_dnan_always;
} else {
/*
* For MIPS systems that conform to IEEE754-2008, the (inf,zero,nan)
* case sets InvalidOp and returns the input value 'c'
*/
rule = float_infzeronan_dnan_never;
}
#elif defined(TARGET_SPARC) || \
defined(TARGET_XTENSA) || defined(TARGET_HPPA) || \ defined(TARGET_XTENSA) || defined(TARGET_HPPA) || \
defined(TARGET_I386) || defined(TARGET_LOONGARCH) defined(TARGET_I386) || defined(TARGET_LOONGARCH)
/* /*

9
target/mips/fpu_helper.h
View file

@ -28,6 +28,7 @@ static inline void restore_flush_mode(CPUMIPSState *env)
static inline void restore_snan_bit_mode(CPUMIPSState *env) static inline void restore_snan_bit_mode(CPUMIPSState *env)
{ {
bool nan2008 = env->active_fpu.fcr31 & (1 << FCR31_NAN2008); bool nan2008 = env->active_fpu.fcr31 & (1 << FCR31_NAN2008);
FloatInfZeroNaNRule izn_rule;
/* /*
* With nan2008, SNaNs are silenced in the usual way. * With nan2008, SNaNs are silenced in the usual way.
@ -35,6 +36,14 @@ static inline void restore_snan_bit_mode(CPUMIPSState *env)
*/ */
set_snan_bit_is_one(!nan2008, &env->active_fpu.fp_status); set_snan_bit_is_one(!nan2008, &env->active_fpu.fp_status);
set_default_nan_mode(!nan2008, &env->active_fpu.fp_status); set_default_nan_mode(!nan2008, &env->active_fpu.fp_status);
/*
* For MIPS systems that conform to IEEE754-1985, the (inf,zero,nan)
* case sets InvalidOp and returns the default NaN.
* For MIPS systems that conform to IEEE754-2008, the (inf,zero,nan)
* case sets InvalidOp and returns the input value 'c'.
*/
izn_rule = nan2008 ? float_infzeronan_dnan_never : float_infzeronan_dnan_always;
set_float_infzeronan_rule(izn_rule, &env->active_fpu.fp_status);
} }
static inline void restore_fp_status(CPUMIPSState *env) static inline void restore_fp_status(CPUMIPSState *env)

4
target/mips/msa.c
View file

@ -74,4 +74,8 @@ void msa_reset(CPUMIPSState *env)
/* set proper signanling bit meaning ("1" means "quiet") */ /* set proper signanling bit meaning ("1" means "quiet") */
set_snan_bit_is_one(0, &env->active_tc.msa_fp_status); set_snan_bit_is_one(0, &env->active_tc.msa_fp_status);
/* Inf * 0 + NaN returns the input NaN */
set_float_infzeronan_rule(float_infzeronan_dnan_never,
&env->active_tc.msa_fp_status);
} }