mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-04 08:13:54 -06:00
target-arm: Support save/load for 64 bit CPUs
For migration to work on 64 bit CPUs, we need to include both the 64-bit integer register file and the PSTATE. Everything else is either stored in the same place as existing 32-bit CPU state or handled by the generic sysreg mechanism. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1417788683-4038-3-git-send-email-peter.maydell@linaro.org
This commit is contained in:
parent
38df27c8a7
commit
a7130a3ef9
1 changed files with 19 additions and 3 deletions
|
@ -127,6 +127,13 @@ static int get_cpsr(QEMUFile *f, void *opaque, size_t size)
|
||||||
CPUARMState *env = &cpu->env;
|
CPUARMState *env = &cpu->env;
|
||||||
uint32_t val = qemu_get_be32(f);
|
uint32_t val = qemu_get_be32(f);
|
||||||
|
|
||||||
|
env->aarch64 = ((val & PSTATE_nRW) == 0);
|
||||||
|
|
||||||
|
if (is_a64(env)) {
|
||||||
|
pstate_write(env, val);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
/* Avoid mode switch when restoring CPSR */
|
/* Avoid mode switch when restoring CPSR */
|
||||||
env->uncached_cpsr = val & CPSR_M;
|
env->uncached_cpsr = val & CPSR_M;
|
||||||
cpsr_write(env, val, 0xffffffff);
|
cpsr_write(env, val, 0xffffffff);
|
||||||
|
@ -137,8 +144,15 @@ static void put_cpsr(QEMUFile *f, void *opaque, size_t size)
|
||||||
{
|
{
|
||||||
ARMCPU *cpu = opaque;
|
ARMCPU *cpu = opaque;
|
||||||
CPUARMState *env = &cpu->env;
|
CPUARMState *env = &cpu->env;
|
||||||
|
uint32_t val;
|
||||||
|
|
||||||
qemu_put_be32(f, cpsr_read(env));
|
if (is_a64(env)) {
|
||||||
|
val = pstate_read(env);
|
||||||
|
} else {
|
||||||
|
val = cpsr_read(env);
|
||||||
|
}
|
||||||
|
|
||||||
|
qemu_put_be32(f, val);
|
||||||
}
|
}
|
||||||
|
|
||||||
static const VMStateInfo vmstate_cpsr = {
|
static const VMStateInfo vmstate_cpsr = {
|
||||||
|
@ -222,12 +236,14 @@ static int cpu_post_load(void *opaque, int version_id)
|
||||||
|
|
||||||
const VMStateDescription vmstate_arm_cpu = {
|
const VMStateDescription vmstate_arm_cpu = {
|
||||||
.name = "cpu",
|
.name = "cpu",
|
||||||
.version_id = 21,
|
.version_id = 22,
|
||||||
.minimum_version_id = 21,
|
.minimum_version_id = 22,
|
||||||
.pre_save = cpu_pre_save,
|
.pre_save = cpu_pre_save,
|
||||||
.post_load = cpu_post_load,
|
.post_load = cpu_post_load,
|
||||||
.fields = (VMStateField[]) {
|
.fields = (VMStateField[]) {
|
||||||
VMSTATE_UINT32_ARRAY(env.regs, ARMCPU, 16),
|
VMSTATE_UINT32_ARRAY(env.regs, ARMCPU, 16),
|
||||||
|
VMSTATE_UINT64_ARRAY(env.xregs, ARMCPU, 32),
|
||||||
|
VMSTATE_UINT64(env.pc, ARMCPU),
|
||||||
{
|
{
|
||||||
.name = "cpsr",
|
.name = "cpsr",
|
||||||
.version_id = 0,
|
.version_id = 0,
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue