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s390x/pci: enhance mpcifc_service_call
Enhance error handling for mpcifc_service_call() to propagate errors to guest by setting status codes or triggering program interrupts. Signed-off-by: Yi Min Zhao <zyimin@linux.vnet.ibm.com> Reviewed-by: Pierre Morel <pmorel@linux.vnet.ibm.com> Signed-off-by: Cornelia Huck <cornelia.huck@de.ibm.com>
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259a4f0a76
commit
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2 changed files with 54 additions and 7 deletions
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@ -721,7 +721,7 @@ void pci_dereg_ioat(S390PCIBusDevice *pbdev)
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int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar)
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int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar)
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{
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{
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CPUS390XState *env = &cpu->env;
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CPUS390XState *env = &cpu->env;
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uint8_t oc;
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uint8_t oc, dmaas;
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uint32_t fh;
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uint32_t fh;
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ZpciFib fib;
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ZpciFib fib;
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S390PCIBusDevice *pbdev;
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S390PCIBusDevice *pbdev;
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@ -733,6 +733,7 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar)
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}
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}
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oc = env->regs[r1] & 0xff;
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oc = env->regs[r1] & 0xff;
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dmaas = (env->regs[r1] >> 16) & 0xff;
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fh = env->regs[r1] >> 32;
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fh = env->regs[r1] >> 32;
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if (fiba & 0x7) {
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if (fiba & 0x7) {
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@ -751,27 +752,65 @@ int mpcifc_service_call(S390CPU *cpu, uint8_t r1, uint64_t fiba, uint8_t ar)
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return 0;
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return 0;
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}
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}
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if (fib.fmt != 0) {
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program_interrupt(env, PGM_OPERAND, 6);
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return 0;
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}
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switch (oc) {
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switch (oc) {
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case ZPCI_MOD_FC_REG_INT:
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case ZPCI_MOD_FC_REG_INT:
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if (reg_irqs(env, pbdev, fib)) {
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if (pbdev->summary_ind) {
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cc = ZPCI_PCI_LS_ERR;
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cc = ZPCI_PCI_LS_ERR;
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s390_set_status_code(env, r1, ZPCI_MOD_ST_SEQUENCE);
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} else if (reg_irqs(env, pbdev, fib)) {
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cc = ZPCI_PCI_LS_ERR;
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s390_set_status_code(env, r1, ZPCI_MOD_ST_RES_NOT_AVAIL);
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}
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}
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break;
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break;
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case ZPCI_MOD_FC_DEREG_INT:
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case ZPCI_MOD_FC_DEREG_INT:
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pci_dereg_irqs(pbdev);
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if (!pbdev->summary_ind) {
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cc = ZPCI_PCI_LS_ERR;
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s390_set_status_code(env, r1, ZPCI_MOD_ST_SEQUENCE);
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} else {
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pci_dereg_irqs(pbdev);
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}
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break;
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break;
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case ZPCI_MOD_FC_REG_IOAT:
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case ZPCI_MOD_FC_REG_IOAT:
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if (reg_ioat(env, pbdev, fib)) {
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if (dmaas != 0) {
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cc = ZPCI_PCI_LS_ERR;
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cc = ZPCI_PCI_LS_ERR;
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s390_set_status_code(env, r1, ZPCI_MOD_ST_DMAAS_INVAL);
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} else if (pbdev->iommu_enabled) {
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cc = ZPCI_PCI_LS_ERR;
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s390_set_status_code(env, r1, ZPCI_MOD_ST_SEQUENCE);
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} else if (reg_ioat(env, pbdev, fib)) {
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cc = ZPCI_PCI_LS_ERR;
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s390_set_status_code(env, r1, ZPCI_MOD_ST_INSUF_RES);
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}
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}
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break;
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break;
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case ZPCI_MOD_FC_DEREG_IOAT:
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case ZPCI_MOD_FC_DEREG_IOAT:
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pci_dereg_ioat(pbdev);
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if (dmaas != 0) {
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cc = ZPCI_PCI_LS_ERR;
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s390_set_status_code(env, r1, ZPCI_MOD_ST_DMAAS_INVAL);
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} else if (!pbdev->iommu_enabled) {
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cc = ZPCI_PCI_LS_ERR;
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s390_set_status_code(env, r1, ZPCI_MOD_ST_SEQUENCE);
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} else {
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pci_dereg_ioat(pbdev);
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}
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break;
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break;
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case ZPCI_MOD_FC_REREG_IOAT:
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case ZPCI_MOD_FC_REREG_IOAT:
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pci_dereg_ioat(pbdev);
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if (dmaas != 0) {
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if (reg_ioat(env, pbdev, fib)) {
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cc = ZPCI_PCI_LS_ERR;
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cc = ZPCI_PCI_LS_ERR;
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s390_set_status_code(env, r1, ZPCI_MOD_ST_DMAAS_INVAL);
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} else if (!pbdev->iommu_enabled) {
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cc = ZPCI_PCI_LS_ERR;
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s390_set_status_code(env, r1, ZPCI_MOD_ST_SEQUENCE);
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} else {
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pci_dereg_ioat(pbdev);
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if (reg_ioat(env, pbdev, fib)) {
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cc = ZPCI_PCI_LS_ERR;
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s390_set_status_code(env, r1, ZPCI_MOD_ST_INSUF_RES);
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}
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}
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}
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break;
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break;
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case ZPCI_MOD_FC_RESET_ERROR:
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case ZPCI_MOD_FC_RESET_ERROR:
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@ -231,6 +231,14 @@ typedef struct ClpReqRspQueryPciGrp {
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#define ZPCI_PCI_LS_BUSY 2
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#define ZPCI_PCI_LS_BUSY 2
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#define ZPCI_PCI_LS_INVAL_HANDLE 3
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#define ZPCI_PCI_LS_INVAL_HANDLE 3
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/* Modify PCI status codes */
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#define ZPCI_MOD_ST_RES_NOT_AVAIL 4
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#define ZPCI_MOD_ST_INSUF_RES 16
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#define ZPCI_MOD_ST_SEQUENCE 24
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#define ZPCI_MOD_ST_DMAAS_INVAL 28
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#define ZPCI_MOD_ST_FRAME_INVAL 32
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#define ZPCI_MOD_ST_ERROR_RECOVER 40
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/* Modify PCI Function Controls */
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/* Modify PCI Function Controls */
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#define ZPCI_MOD_FC_REG_INT 2
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#define ZPCI_MOD_FC_REG_INT 2
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#define ZPCI_MOD_FC_DEREG_INT 3
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#define ZPCI_MOD_FC_DEREG_INT 3
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