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tcg/aarch64: Improve deposit

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Use ANDI for deposit 0 into a register.
Use UBFIZ, aka UBFM, for deposit register into 0.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2025-01-12 20:42:13 -08:00
parent cf4905c031
commit a5a8dd33aa
2 changed files with 29 additions and 2 deletions
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2
tcg/aarch64/tcg-target-con-set.h
View file

@ -18,7 +18,6 @@ C_O1_I1(r, r)
C_O1_I1(w, r)
C_O1_I1(w, w)
C_O1_I1(w, wr)
C_O1_I2(r, 0, rz)
C_O1_I2(r, r, r)
C_O1_I2(r, r, rA)
C_O1_I2(r, r, rAL)
@ -26,6 +25,7 @@ C_O1_I2(r, r, rC)
C_O1_I2(r, r, ri)
C_O1_I2(r, r, rL)
C_O1_I2(r, rz, rz)
C_O1_I2(r, rZ, rZ)
C_O1_I2(w, 0, w)
C_O1_I2(w, w, w)
C_O1_I2(w, w, wN)

29
tcg/aarch64/tcg-target.c.inc
View file

@ -2572,12 +2572,39 @@ static void tgen_deposit(TCGContext *s, TCGType type, TCGReg a0, TCGReg a1,
TCGReg a2, unsigned ofs, unsigned len)
{
unsigned mask = type == TCG_TYPE_I32 ? 31 : 63;
/*
* Since we can't support "0Z" as a constraint, we allow a1 in
* any register. Fix things up as if a matching constraint.
*/
if (a0 != a1) {
if (a0 == a2) {
tcg_out_mov(s, type, TCG_REG_TMP0, a2);
a2 = TCG_REG_TMP0;
}
tcg_out_mov(s, type, a0, a1);
}
tcg_out_bfm(s, type, a0, a2, -ofs & mask, len - 1);
}
static void tgen_depositi(TCGContext *s, TCGType type, TCGReg a0, TCGReg a1,
tcg_target_long a2, unsigned ofs, unsigned len)
{
tgen_andi(s, type, a0, a1, ~MAKE_64BIT_MASK(ofs, len));
}
static void tgen_depositz(TCGContext *s, TCGType type, TCGReg a0, TCGReg a2,
unsigned ofs, unsigned len)
{
int max = type == TCG_TYPE_I32 ? 31 : 63;
tcg_out_ubfm(s, type, a0, a2, -ofs & max, len - 1);
}
static const TCGOutOpDeposit outop_deposit = {
.base.static_constraint = C_O1_I2(r, 0, rz),
.base.static_constraint = C_O1_I2(r, rZ, rZ),
.out_rrr = tgen_deposit,
.out_rri = tgen_depositi,
.out_rzr = tgen_depositz,
};
static void tgen_extract(TCGContext *s, TCGType type, TCGReg a0, TCGReg a1,