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e1000: document ICS read behaviour

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Add code comment to clarify the reason we set ICS with ICR:
the reason was previously undocumented and git
log confused rather than clarified the comments.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Michael S. Tsirkin 2013-01-09 23:50:00 +02:00
parent 0893d46014
commit a52a884103
1 changed files with 10 additions and 0 deletions
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10
hw/e1000.c
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@ -237,7 +237,17 @@ set_interrupt_cause(E1000State *s, int index, uint32_t val)
val |= E1000_ICR_INT_ASSERTED; val |= E1000_ICR_INT_ASSERTED;
} }
s->mac_reg[ICR] = val; s->mac_reg[ICR] = val;
/*
* Make sure ICR and ICS registers have the same value.
* The spec says that the ICS register is write-only. However in practice,
* on real hardware ICS is readable, and for reads it has the same value as
* ICR (except that ICS does not have the clear on read behaviour of ICR).
*
* The VxWorks PRO/1000 driver uses this behaviour.
*/
s->mac_reg[ICS] = val; s->mac_reg[ICS] = val;
qemu_set_irq(s->dev.irq[0], (s->mac_reg[IMS] & s->mac_reg[ICR]) != 0); qemu_set_irq(s->dev.irq[0], (s->mac_reg[IMS] & s->mac_reg[ICR]) != 0);
} }